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Thu, 29 Oct 2026 06:10:58 -0700 (PDT) Received: from localhost.localdomain ([103.178.205.79]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1a76037e2b5sm22072457c88.21.2026.10.29.06.10.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 06:10:58 -0700 (PDT) From: Sreeraj S Kurup To: linux-pci@vger.kernel.org Cc: jingoohan1@gmail.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org, bhelgaas@google.com, krzk@kernel.org, peter.griffin@linaro.org, alim.akhtar@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Sreeraj S Kurup Subject: [PATCH] PCI: exynos: Handle PHY initialization errors Date: Thu, 29 Oct 2026 13:10:06 +0000 Message-ID: <20261029131006.2744-1-sreekuttan2156239@gmail.com> X-Mailer: git-send-email 2.55.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Check the return values of phy_init() and phy_power_on() to avoid continuing PCIe host initialization when PHY setup fails. If phy_power_on() fails, call phy_exit() to release the PHY resources initialized by phy_init() before returning the error. Signed-off-by: Sreeraj S Kurup --- drivers/pci/controller/dwc/pci-exynos.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controller/dwc/pci-exynos.c index e3c05ade381b..5ad07c0be8e5 100644 --- a/drivers/pci/controller/dwc/pci-exynos.c +++ b/drivers/pci/controller/dwc/pci-exynos.c @@ -225,13 +225,21 @@ static int exynos_pcie_host_init(struct dw_pcie_rp *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct exynos_pcie *ep = to_exynos_pcie(pci); + int ret; pp->bridge->ops = &exynos_pci_ops; exynos_pcie_assert_core_reset(ep); - phy_init(ep->phy); - phy_power_on(ep->phy); + ret = phy_init(ep->phy); + if (ret) + return ret; + + ret = phy_power_on(ep->phy); + if (ret) { + phy_exit(ep->phy); + return ret; + } exynos_pcie_deassert_core_reset(ep); exynos_pcie_enable_irq_pulse(ep); -- 2.55.0