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[67.168.198.145]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ae845aa27esm1054544a91.11.2026.10.29.14.23.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 14:23:49 -0700 (PDT) From: Rob Clark To: iommu@lists.linux.dev Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov , Rob Clark , Will Deacon , Robin Murphy , "Joerg Roedel (AMD)" , linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVERS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/2] iommu/qcom: Use identity domain for GPU and display Date: Thu, 29 Oct 2026 14:23:42 -0700 Message-ID: <20261029212344.346069-2-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261029212344.346069-1-robin.clark@oss.qualcomm.com> References: <20261029212344.346069-1-robin.clark@oss.qualcomm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI5MDA4NCBTYWx0ZWRfX2wstkNTPMYAs 9V1b2b82badhpE1pY+Hzi4lbWSJE8nxPPugY7vtiYdG9NVnQQpyjQrzP6ZVefwKve67RJ4lHjoa Rf95XgoAoORfZBRd1noS7jIPPVan2CY= X-Authority-Analysis: v=2.4 cv=ZvN4uN7G c=1 sm=1 tr=0 ts=6ae3b966 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=6Rn/7xRx7Ub4NEhlm8k1cw==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=554yuftmPdPD4gaTNL8A:9 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI5MDA4NCBTYWx0ZWRfX19QwwQ2e+DqF sAuYTRVWIBCHoskIDpYUUKnX6FLzR8CBofr4H62byPH7zsbg8GHHM2MBPM6D+1fIN/O2q82qtWF bOCX8f3mQjdenHYUI1Xubf+Af9umVGVxzZ+Op7N19Hbz0/8osDp5LfYTPyh9/ovGwH4Xwg/X4Cw d7R0pRABMK1+ODFd8mrTLXqpKrLwxuBxeFEJ5mQPl5heMhAfCNe8dRoYzxCCHjysnJ6r+KuGB4j RcHX0ntqj3o5M+/KK89ghWa3eFfW0LAGRaX5wUPMXLLuINDlzOFPwtSEuQL/YRcMqjz2wtBmkw1 4it+1gQM0QWnyUEckxpzTimYZPknrsEL2E0kVHgg2kSTYC8AE4swLVm+SlmvJTxOLTjY4/FrM/W F6PnHuwkQoxC0+lFVLx+FZZm1w8qWFDrdpzgEGNRYtVC+Utn1fzV4v7VEE7v3M181WtwKHT3Alh SR4sT0un5WY7ZSSWajw== X-Proofpoint-ORIG-GUID: pdsssoJQhUddOn0B1khvWbdVKawwaD3W X-Proofpoint-GUID: pdsssoJQhUddOn0B1khvWbdVKawwaD3W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-29_06,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610290084 Similar to commit 0e764a01015d ("iommu/arm-smmu: Allow client devices to select direct mapping") for arm-smmu-qcom, match GPU and display compat strings to pick identity domain time. The drm/msm driver attaches it's own domain, which it manages directly, so we don't want an iommu managed domain interfering. Signed-off-by: Rob Clark --- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index 21d18ce67b98..5b10feb419d8 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -589,6 +590,22 @@ static int qcom_iommu_of_xlate(struct device *dev, return iommu_fwspec_add_ids(dev, &asid, 1); } +static const struct of_device_id qcom_iommu_client_of_match[] = { + { .compatible = "qcom,adreno" }, + { .compatible = "qcom,mdp4" }, + { .compatible = "qcom,mdp5" }, + { .compatible = "qcom,mdss" }, + { } +}; + +static int qcom_iommu_def_domain_type(struct device *dev) +{ + const struct of_device_id *match = + of_match_device(qcom_iommu_client_of_match, dev); + + return match ? IOMMU_DOMAIN_IDENTITY : 0; +} + static const struct iommu_ops qcom_iommu_ops = { .identity_domain = &qcom_iommu_identity_domain, .capable = qcom_iommu_capable, @@ -596,6 +613,7 @@ static const struct iommu_ops qcom_iommu_ops = { .probe_device = qcom_iommu_probe_device, .device_group = generic_device_group, .of_xlate = qcom_iommu_of_xlate, + .def_domain_type = qcom_iommu_def_domain_type, .default_domain_ops = &(const struct iommu_domain_ops) { .attach_dev = qcom_iommu_attach_dev, .map_pages = qcom_iommu_map, -- 2.56.0