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Since both GPU and GMU should be bound to a driver before a devfreq/thermal mitigation request can be handled, move the devfreq registration to the bind call of the master device. Signed-off-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 111 ++++++++++++++++++++--------- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 19 +---- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 - drivers/gpu/drm/msm/adreno/adreno_device.c | 5 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 + drivers/gpu/drm/msm/msm_drv.c | 39 ++++++---- drivers/gpu/drm/msm/msm_gpu.c | 3 - drivers/gpu/drm/msm/msm_gpu.h | 1 + drivers/gpu/drm/msm/msm_gpu_devfreq.c | 5 ++ 9 files changed, 115 insertions(+), 73 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 5d96b55a624a..715d70a51004 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -5,7 +5,7 @@ #include #include #include -#include +#include #include #include #include @@ -2155,7 +2155,7 @@ void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu, bool force_on) pm_runtime_put(&gpu->pdev->dev); } -void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu) +static void a6xx_gmu_destroy(struct a6xx_gpu *a6xx_gpu) { struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; @@ -2200,9 +2200,6 @@ void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu) free_irq(gmu->gmu_irq, gmu); free_irq(gmu->hfi_irq, gmu); } - - /* Drop reference taken in of_find_device_by_node */ - put_device(gmu->dev); } static int cxpd_notifier_cb(struct notifier_block *nb, @@ -2238,9 +2235,9 @@ static void __iomem *a6xx_gmu_get_mmio(struct platform_device *pdev, resource_si return ret; } -int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) +static int a6xx_gmu_wrapper_pdev_bind(struct a6xx_gpu *a6xx_gpu, struct device *dev) { - struct platform_device *pdev = of_find_device_by_node(node); + struct platform_device *pdev = to_platform_device(dev); struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; @@ -2248,14 +2245,7 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) struct resource *res; int ret; - if (!pdev) - return -ENODEV; - - gmu->dev = &pdev->dev; - - ret = of_dma_configure(gmu->dev, node, true); - if (ret) - return ret; + gmu->dev = dev; pm_runtime_enable(gmu->dev); @@ -2265,7 +2255,7 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) /* RGMU requires clocks */ ret = devm_clk_bulk_get_all(gmu->dev, &gmu->clocks); if (ret < 0) - goto err_clk; + return ret; gmu->nr_clocks = ret; @@ -2308,6 +2298,8 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) goto err_mmio; } + mutex_init(&gmu->lock); + gmu->initialized = true; return 0; @@ -2318,16 +2310,12 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) err_mmio: iounmap(gmu->mmio); -err_clk: - /* Drop reference taken in of_find_device_by_node */ - put_device(gmu->dev); - return ret; } -int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) +static int a6xx_gmu_pdev_bind(struct a6xx_gpu *a6xx_gpu, struct device *dev) { - struct platform_device *pdev = of_find_device_by_node(node); + struct platform_device *pdev = to_platform_device(dev); struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; @@ -2337,14 +2325,7 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) struct resource *res; int ret; - if (!pdev) - return -ENODEV; - - gmu->dev = &pdev->dev; - - ret = of_dma_configure(gmu->dev, node, true); - if (ret) - return ret; + gmu->dev = dev; /* Set GMU idle level */ gmu->idle_level = (adreno_gpu->info->quirks & ADRENO_QUIRK_IFPC) ? @@ -2355,11 +2336,11 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) /* Get the list of clocks */ ret = a6xx_gmu_clocks_probe(gmu); if (ret) - goto err_put_device; + return ret; ret = a6xx_gmu_memory_probe(adreno_gpu->base.dev, gmu); if (ret) - goto err_put_device; + return ret; /* A660 now requires handling "prealloc requests" in GMU firmware @@ -2531,6 +2512,7 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) /* Initialize RPMh */ a6xx_gmu_rpmh_init(gmu); + mutex_init(&gmu->lock); gmu->initialized = true; return 0; @@ -2562,9 +2544,68 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) err_memory: a6xx_gmu_memory_free(gmu); -err_put_device: - /* Drop reference taken in of_find_device_by_node */ - put_device(gmu->dev); return ret; } + +static int a6xx_gmu_bind(struct device *dev, struct device *master, void *data) +{ + int (*bind)(struct a6xx_gpu *gpu, struct device *dev) = of_device_get_match_data(dev); + struct msm_drm_private *priv = msm_drm_get_priv(master); + struct msm_gpu *gpu = dev_to_gpu(&priv->gpu_pdev->dev); + + if (WARN_ON(!gpu)) + return -ENODEV; + + return bind(to_a6xx_gpu(to_adreno_gpu(gpu)), dev); +} + +static void a6xx_gmu_unbind(struct device *dev, struct device *master, void *data) +{ + struct msm_drm_private *priv = msm_drm_get_priv(master); + struct msm_gpu *gpu = dev_to_gpu(&priv->gpu_pdev->dev); + + a6xx_gmu_destroy(to_a6xx_gpu(to_adreno_gpu(gpu))); +} + +static const struct component_ops a6xx_gmu_bind_ops = { + .bind = a6xx_gmu_bind, + .unbind = a6xx_gmu_unbind, +}; + +static int a6xx_gmu_probe(struct platform_device *pdev) +{ + return component_add(&pdev->dev, &a6xx_gmu_bind_ops); +} + +static void a6xx_gmu_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &a6xx_gmu_bind_ops); +} + +static const struct of_device_id a6xx_gmu_dt_match[] = { + { .compatible = "qcom,adreno-gmu", .data = a6xx_gmu_pdev_bind }, + { .compatible = "qcom,adreno-rgmu", .data = a6xx_gmu_wrapper_pdev_bind }, + { .compatible = "qcom,adreno-gmu-wrapper", .data = a6xx_gmu_wrapper_pdev_bind }, + { } +}; +MODULE_DEVICE_TABLE(of, a6xx_gmu_dt_match); + +static struct platform_driver adreno_gmu_driver = { + .probe = a6xx_gmu_probe, + .remove = a6xx_gmu_remove, + .driver = { + .name = "adreno_gmu", + .of_match_table = a6xx_gmu_dt_match, + }, +}; + +void __init adreno_gmu_register(void) +{ + platform_driver_register(&adreno_gmu_driver); +} + +void __exit adreno_gmu_unregister(void) +{ + platform_driver_unregister(&adreno_gmu_driver); +} diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 92e8c8abb86d..0bdab662dafa 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2327,8 +2327,6 @@ static void a6xx_destroy(struct msm_gpu *gpu) a6xx_llc_slices_destroy(a6xx_gpu); - a6xx_gmu_remove(a6xx_gpu); - adreno_gpu_cleanup(adreno_gpu); kfree(a6xx_gpu); @@ -2705,7 +2703,6 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) gpu->num_perfcntr_groups = a8xx_num_perfcntr_groups; } - mutex_init(&a6xx_gpu->gmu.lock); spin_lock_init(&a6xx_gpu->aperture_lock); adreno_gpu->registers = NULL; @@ -2713,10 +2710,9 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) /* Check if there is a GMU phandle and set it up */ struct device_node *node __free(device_node) = of_parse_phandle(pdev->dev.of_node, "qcom,gmu", 0); - /* FIXME: How do we gracefully handle this? */ - BUG_ON(!node); - - adreno_gpu->gmu_is_wrapper = of_device_is_compatible(node, "qcom,adreno-gmu-wrapper"); + WARN_ON(!node); + adreno_gpu->gmu_is_wrapper = of_device_is_compatible(node, + "qcom,adreno-gmu-wrapper"); adreno_gpu->base.hw_apriv = !!(info->quirks & ADRENO_QUIRK_HAS_HW_APRIV); @@ -2769,15 +2765,6 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) if (adreno_is_a618(adreno_gpu) || adreno_is_7c3(adreno_gpu)) priv->gpu_clamp_to_idle = true; - if (adreno_has_gmu_wrapper(adreno_gpu) || adreno_has_rgmu(adreno_gpu)) - ret = a6xx_gmu_wrapper_init(a6xx_gpu, node); - else - ret = a6xx_gmu_init(a6xx_gpu, node); - if (ret) { - a6xx_destroy(&(a6xx_gpu->base.base)); - return ERR_PTR(ret); - } - adreno_gpu->uche_trap_base = 0x1fffffffff000ull; msm_mmu_set_fault_handler(to_msm_vm(gpu->vm)->mmu, gpu, diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h index 79912a33e17c..b308b5bbff80 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -295,9 +295,6 @@ bool a6xx_gmu_isidle(struct a6xx_gmu *gmu); int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state); void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state); -int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node); -int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node); -void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu); void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu, bool force_on); void a6xx_preempt_init(struct msm_gpu *gpu); diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 6b694b8bf8e3..7066be3b8e15 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -250,7 +250,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) return 0; } -static int adreno_system_suspend(struct device *dev); static void adreno_unbind(struct device *dev, struct device *master, void *data) { @@ -371,7 +370,7 @@ static void resume_scheduler(struct msm_gpu *gpu) } } -static int adreno_system_suspend(struct device *dev) +int adreno_system_suspend(struct device *dev) { struct msm_gpu *gpu = dev_to_gpu(dev); int remaining, ret; @@ -431,6 +430,7 @@ void __init adreno_register(void) return; platform_driver_register(&adreno_driver); + adreno_gmu_register(); } void __exit adreno_unregister(void) @@ -438,5 +438,6 @@ void __exit adreno_unregister(void) if (skip_gpu) return; + adreno_gmu_unregister(); platform_driver_unregister(&adreno_driver); } diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 4b2156825bdf..9e0d37ec9c15 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -678,6 +678,8 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state); int adreno_gpu_state_put(struct msm_gpu_state *state); void adreno_show_object(struct drm_printer *p, void **ptr, int len, bool *encoded); +void adreno_gmu_register(void); +void adreno_gmu_unregister(void); /* * Common helper function to initialize the default address space for arm-smmu diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index dbb6c70473bf..9ad2260f4971 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -5,6 +5,7 @@ * Author: Rob Clark */ +#include #include #include #include @@ -172,6 +173,14 @@ static int msm_drm_uninit(struct device *dev, const struct component_ops *gpu_op if (priv->kms) msm_drm_kms_uninit(dev); + if (priv->gpu_pdev) { + struct device *gpu_dev = &priv->gpu_pdev->dev; + + if (pm_runtime_enabled(gpu_dev)) + WARN_ON_ONCE(adreno_system_suspend(gpu_dev)); + msm_devfreq_cleanup(dev_to_gpu(gpu_dev)); + } + if (gpu_ops) gpu_ops->unbind(dev, dev, NULL); else @@ -237,6 +246,10 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv, if (ret) goto err_put_dev; + /* Devfreq callbacks require the GPU and GMU to be initialized. */ + if (priv->gpu_pdev) + msm_devfreq_init(dev_to_gpu(&priv->gpu_pdev->dev)); + ret = msm_gem_shrinker_init(ddev); if (ret) goto err_msm_uninit; @@ -1103,18 +1116,20 @@ static const struct of_device_id msm_gpu_match[] = { }; static int add_gpu_components(struct device *dev, + struct device_node *gpu_np, struct component_match **matchptr) { - struct device_node *np; + struct device_node *np __free(device_node) = gpu_np ? + of_node_get(gpu_np) : of_find_matching_node(NULL, msm_gpu_match); - np = of_find_matching_node(NULL, msm_gpu_match); - if (!np) + if (!np || !msm_gpu_node_present(np)) return 0; - if (msm_gpu_node_present(np)) - drm_of_component_match_add(dev, matchptr, component_compare_of, np); + drm_of_component_match_add(dev, matchptr, component_compare_of, np); - of_node_put(np); + struct device_node *gmu_np __free(device_node) = of_parse_phandle(np, "qcom,gmu", 0); + if (of_device_is_available(gmu_np)) + drm_of_component_match_add(dev, matchptr, component_compare_of, gmu_np); return 0; } @@ -1163,7 +1178,7 @@ int msm_drv_probe(struct device *master_dev, } if (!msm_separate_gpu_kms_components()) { - ret = add_gpu_components(master_dev, &match); + ret = add_gpu_components(master_dev, NULL, &match); if (ret) return ret; } @@ -1216,13 +1231,9 @@ int msm_gpu_probe(struct platform_device *pdev) if (ret) return ret; - /* - * The GPU pdev acts as both the component master and the sole - * component (added by adreno_probe()). Future patches add the - * GMU node as a second component on this same master. - */ - drm_of_component_match_add(&pdev->dev, &match, - component_compare_of, pdev->dev.of_node); + ret = add_gpu_components(&pdev->dev, pdev->dev.of_node, &match); + if (ret) + return ret; return component_master_add_with_match(&pdev->dev, &msm_gpu_drm_ops, match); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 0c2c35636251..1b558777e241 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -968,8 +968,6 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, platform_set_drvdata(pdev, &gpu->adreno_smmu); - msm_devfreq_init(gpu); - gpu->vm = gpu->funcs->create_vm(gpu, pdev); if (IS_ERR(gpu->vm)) { ret = PTR_ERR(gpu->vm); @@ -1062,7 +1060,6 @@ void msm_gpu_cleanup(struct msm_gpu *gpu) kthread_destroy_worker(gpu->worker); } - msm_devfreq_cleanup(gpu); msm_perfcntr_cleanup(gpu); platform_set_drvdata(gpu->pdev, NULL); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index d27d54bdb7a7..d76aa17044ec 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -756,6 +756,7 @@ msm_gpu_create_private_vm(struct msm_gpu *gpu, struct task_struct *task, void msm_gpu_cleanup(struct msm_gpu *gpu); struct msm_gpu *adreno_load_gpu(struct drm_device *dev); +int adreno_system_suspend(struct device *dev); bool adreno_has_gpu(struct device_node *node); void __init adreno_register(void); void __exit adreno_unregister(void); diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c b/drivers/gpu/drm/msm/msm_gpu_devfreq.c index 2e1d5c343272..025e608f45b4 100644 --- a/drivers/gpu/drm/msm/msm_gpu_devfreq.c +++ b/drivers/gpu/drm/msm/msm_gpu_devfreq.c @@ -221,8 +221,13 @@ void msm_devfreq_cleanup(struct msm_gpu *gpu) if (!has_devfreq(gpu)) return; + cancel_idle_work(df); + cancel_boost_work(df); + devfreq_cooling_unregister(gpu->cooling); dev_pm_qos_remove_request(&df->boost_freq); + devm_devfreq_remove_device(&gpu->pdev->dev, df->devfreq); + df->devfreq = NULL; } void msm_devfreq_resume(struct msm_gpu *gpu) -- 2.55.0