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Reviewed-by: Rob Herring Signed-off-by: Liu Ying --- Changed commit message to use imperative mood. v5: - Add the DT binding file in MAINTAINERS. (Krzysztof) --- .../bindings/display/imx/fsl,imx8qxp-dprc.yaml | 100 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 101 insertions(+) diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dprc.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dprc.yaml new file mode 100644 index 000000000000..bd94254c1288 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dprc.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dprc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8qm/qxp Display Prefetch Resolve Channel + +maintainers: + - Liu Ying + +description: | + The i.MX8qm/qxp Display Prefetch Resolve Channel(DPRC) is an engine which + fetches display data before the display pipeline needs the data to drive + pixels in the active display region. This data is transformed, or resolved, + from a variety of tiled buffer formats into linear format, if needed. + The DPR works with a double bank memory structure. This memory structure is + implemented in the Resolve Tile Memory(RTRAM) and the banks are referred to + as A and B. Each bank is either 4 or 8 lines high depending on the source + frame buffer format. + +properties: + compatible: + enum: + - fsl,imx8qxp-dpr-channel + - fsl,imx8qm-dpr-channel + + reg: + maxItems: 1 + + interrupts-extended: + items: + - description: DPR wrap interrupt + - description: | + 'r_rtram_stall' interrupt which indicates relevant i.MX8qm/qxp + Prefetch Resolve Gasket(PRG) or PRGs are forcing an underflow + condition in the RTRAM. + + interrupt-names: + items: + - const: dpr_wrap + - const: r_rtram_stall + + clocks: + items: + - description: apb clock + - description: b clock + - description: rtram clock + + clock-names: + items: + - const: apb + - const: b + - const: rtram + + fsl,sc-resource: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The SCU resource ID associated with this DPRC instance. + + fsl,prgs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + List of phandle which points to PRG or PRGs associated with + this DPRC instance. + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts-extended + - interrupt-names + - clocks + - clock-names + - fsl,sc-resource + - fsl,prgs + - power-domains + +additionalProperties: false + +examples: + - | + #include + #include + #include + dpr-channel@56100000 { + compatible = "fsl,imx8qxp-dpr-channel"; + reg = <0x56100000 0x10000>; + interrupts-extended = <&gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <&dc0_irqsteer 324>; + interrupt-names = "dpr_wrap", "r_rtram_stall"; + clocks = <&dc0_dpr1_lpcg IMX_LPCG_CLK_4>, + <&dc0_dpr1_lpcg IMX_LPCG_CLK_5>, + <&dc0_rtram1_lpcg IMX_LPCG_CLK_0>; + clock-names = "apb", "b", "rtram"; + fsl,sc-resource = ; + fsl,prgs = <&dc0_prg4>, <&dc0_prg5>; + power-domains = <&pd IMX_SC_R_DC_0>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index d9a6bdc65826..cbb8aef958e5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8806,6 +8806,7 @@ L: dri-devel@lists.freedesktop.org S: Maintained T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc*.yaml +F: Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dprc.yaml F: Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml F: drivers/gpu/drm/imx/dc/ -- 2.43.0