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[24.85.96.29]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cdb0981c5desm111713a12.27.2026.10.29.20.29.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 20:29:51 -0700 (PDT) From: Mahmoud Abumandour To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Mahmoud Abumandour Subject: [PATCH v2 0/2] KVM: nVMX: Don't let L2's LMSW modify CR0 bits owned by L1 Date: Thu, 29 Oct 2026 20:29:35 -0700 Message-Id: <20261030032937.2813-1-ma.mandourr@gmail.com> X-Mailer: git-send-email 2.40.1.windows.1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable When L2's LMSW exits to L0 but not to L1, KVM emulates it with=0D kvm_lmsw(), which ignores vmcs12's CR0 guest/host mask, so L2 can change=0D CR0 bits that L1 owns.=0D =0D v2:=0D - Patch 2: order the CR0 store before FNOP and check L2's whole CR0.=0D =0D v1: https://lore.kernel.org/all/20261029235040.12013-1-ma.mandourr@gmail.co= m=0D =0D Mahmoud Abumandour (2):=0D KVM: nVMX: Don't let L2's LMSW modify CR0 bits owned by L1=0D KVM: selftests: Verify that L2's LMSW leaves L1-owned CR0 bits alone=0D =0D arch/x86/kvm/vmx/vmx.c | 15 ++++++++=0D .../kvm/x86/nested_exceptions_test.c | 36 +++++++++++++++++++=0D 2 files changed, 51 insertions(+)=0D =0D =0D base-commit: dea4f6380f4ec96e8f3b0aaf2343764bd0d25ef4=0D -- =0D 2.25.1=0D =0D