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Thu, 29 Oct 2026 21:29:23 -0700 (PDT) Received: from freddie-kane.lan ([71.212.222.246]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ae8826a769sm606067a91.4.2026.10.29.21.29.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 21:29:23 -0700 (PDT) From: Burke Cates To: Xilin Wu Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, dragon@radxa.com, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 11/20] drm/msm/dp: Cache eDP link capabilities after successful discovery Date: Thu, 29 Oct 2026 21:29:00 -0700 Message-ID: <20261030042912.2745609-1-burke.cates@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20261009-msm-dp-hdr10-v2-11-1835d4966da3@radxa.com> References: <20261009-msm-dp-hdr10-v2-0-1835d4966da3@radxa.com> <20261009-msm-dp-hdr10-v2-11-1835d4966da3@radxa.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On 09-Oct-26 11:16, Xilin Wu wrote: > Discover eDP capabilities from connector detect before the first > modeset. I tested this patch on its own (not the rest of the series) on an ASUS Zenbook A16 (UX3607OA, Snapdragon X2 Elite), on v7.3 plus out-of-tree Glymur platform/board patches, which include other msm DP changes. Without it, msm chose the eDP output bpp before the panel's link caps had been read, so the first modeset after boot ran the 2880x1800@120 OLED at 18 bpp until a DPMS off/on. With this patch the first modeset after boot comes up at 24 bpp, 4 lanes at HBR2, with no link-training retries, on two boots of two different builds. Tested-by: Burke Cates # ASUS Zenbook A16 (UX3607OA) AI coding assistants helped run these tests and draft this reply; the results are from the hardware runs. Thanks, Burke