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From: Jenhao Chen <jenhaochen@google.com>
To: Nick Terrell <terrelln@fb.com>
Cc: linux-kernel@vger.kernel.org, Minchan Kim <minchan@kernel.org>,
	 Martin Liu <liumartin@google.com>, Ben Wei <benwei@google.com>,
	 Jenhao Chen <jenhaochen@google.com>
Subject: [PATCH] zstd: Build with -O3 and use shift mask on arm64
Date: Fri, 30 Oct 2026 12:16:33 +0000	[thread overview]
Message-ID: <20261030121633.258612-1-jenhaochen@google.com> (raw)

Upstream user-space zstd builds with -O3 by default, and lib/lz4/Makefile
already sets ccflags-y += -O3. However, lib/zstd/Makefile compiles at
-O2, and BIT_getMiddleBits() only enables the branchless shift-and-mask
path on x86_64, falling back to a BIT_mask[] lookup table load on arm64.

Add ccflags-y += -O3 to lib/zstd/Makefile and enable the shift-and-mask
path in BIT_getMiddleBits() on __aarch64__. On arm64, this reduces zstd
CPU cycles by ~7% and improves decompression throughput by 12-23%.

Signed-off-by: Jenhao Chen <jenhaochen@google.com>
---
 lib/zstd/Makefile           | 2 ++
 lib/zstd/common/bitstream.h | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/zstd/Makefile b/lib/zstd/Makefile
index be218b5e0ed59..900922ab5b94a 100644
--- a/lib/zstd/Makefile
+++ b/lib/zstd/Makefile
@@ -12,6 +12,8 @@ obj-$(CONFIG_ZSTD_COMPRESS) += zstd_compress.o
 obj-$(CONFIG_ZSTD_DECOMPRESS) += zstd_decompress.o
 obj-$(CONFIG_ZSTD_COMMON) += zstd_common.o
 
+ccflags-y += -O3
+
 zstd_compress-y := \
 		zstd_compress_module.o \
 		compress/fse_compress.o \
diff --git a/lib/zstd/common/bitstream.h b/lib/zstd/common/bitstream.h
index 86439da0eea76..01e69ab7053b4 100644
--- a/lib/zstd/common/bitstream.h
+++ b/lib/zstd/common/bitstream.h
@@ -299,7 +299,7 @@ FORCE_INLINE_TEMPLATE BitContainerType BIT_getMiddleBits(BitContainerType bitCon
      * such cpus old (pre-Haswell, 2013) and their performance is not of that
      * importance.
      */
-#if defined(__x86_64__) || defined(_M_X64)
+#if defined(__x86_64__) || defined(_M_X64) || defined(__aarch64__)
     return (bitContainer >> (start & regMask)) & ((((U64)1) << nbBits) - 1);
 #else
     return (bitContainer >> (start & regMask)) & BIT_mask[nbBits];
-- 
2.56.0.317.g454f8302e1-goog


                 reply	other threads:[~2026-10-30 12:16 UTC|newest]

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