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[3.110.210.194]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4a92167b03csm322536fac.2.2026.10.30.09.20.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 09:20:48 -0700 (PDT) From: Samarth Narang To: Miquel Raynal , Vignesh Raghavendra , Han Xu , Manivannan Sadhasivam , Maxime Coquelin , Alexandre Torgue Cc: Richard Weinberger , linux-mtd@lists.infradead.org, imx@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samarth Narang Subject: [PATCH v2 0/6] mtd: nand: stop DMA before unmapping on error and timeout paths Date: Fri, 30 Oct 2026 16:20:35 +0000 Message-Id: <20261030162041.2998170-1-samarth.colleges@gmail.com> X-Mailer: git-send-email 2.34.1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series addresses DMA lifecycle issues in six NAND drivers where error or timeout paths may unmap buffers before the associated DMA transfers have stopped. Some paths do not terminate the outstanding transfers, while others use dmaengine_terminate_all(), which does not guarantee that the channel has stopped before returning. The patches use dmaengine_terminate_sync() to ensure that DMA has stopped before releasing the mappings, and all affected functions already run in a context where sleeping is permitted. These issues were identified by a research static analyzer for DMA lifecycle ordering and have not been validated on hardware. The patches have only been compile-tested on arm64 with W=1. Changes in v2: - Combined the previously submitted patches into a single series, as requested by Miquel, and included three additional drivers with similar issues (omap2, marvell, and sh_flctl). - Removed the code comment from the gpmi patch. - Left qpic_common and stm32_fmc2 unchanged from their earlier submissions. Two questions remain for the qpic_common patch. The BAM driver warns that resetting a pipe while the attached engine is still active may cause a fatal error, so it is unclear whether the NAND controller must be stopped or reset before terminating the DMA channels. The success path also assumes that completion of the final command descriptor guarantees completion of the RX data descriptor, which may need confirmation from the hardware maintainers. v1: https://lore.kernel.org/all/20261030143945.2923554-1-samarth.colleges@gmail.com/ https://lore.kernel.org/all/20261030150929.2944717-1-samarth.colleges@gmail.com/ https://lore.kernel.org/all/20261030150646.2942368-1-samarth.colleges@gmail.com/ https://lore.kernel.org/all/20261030151843.2953269-1-samarth.colleges@gmail.com/ Samarth Narang (6): mtd: rawnand: gpmi: terminate the DMA chain on completion timeout mtd: nand: qpic_common: terminate DMA channels on transfer timeout mtd: rawnand: stm32_fmc2: retire data DMA before unmapping on errors mtd: rawnand: omap2: terminate DMA when prefetch cannot be enabled mtd: rawnand: marvell: stop DMA before unmapping on timeout mtd: rawnand: sh_flctl: use dmaengine_terminate_sync() on DMA timeout drivers/mtd/nand/qpic_common.c | 11 +++++++++-- drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 1 + drivers/mtd/nand/raw/marvell_nand.c | 9 +++++---- drivers/mtd/nand/raw/omap2.c | 4 +++- drivers/mtd/nand/raw/sh_flctl.c | 2 +- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 13 ++++++++----- 6 files changed, 27 insertions(+), 13 deletions(-) base-commit: 24a19b953e2a3d0ea5a8c4951a0ab8f32720c907 -- 2.34.1