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Fri, 30 Oct 2026 10:48:25 -0700 Received: from build-bwicaksono-noble-20260804.internal (10.127.8.11) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.2562.56 via Frontend Transport; Fri, 30 Oct 2026 10:48:25 -0700 From: Besar Wicaksono To: , , , CC: , , , , , , , , , , , , , , , , , , , , Besar Wicaksono Subject: [PATCH v2 0/9] perf: Add NVIDIA Tegra410 uncore PMU events and metrics Date: Fri, 30 Oct 2026 17:48:07 +0000 Message-ID: <20261030174816.1544471-1-bwicaksono@nvidia.com> X-Mailer: git-send-email 2.43.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA0PEPF00000045:EE_|DS0PR12MB7780:EE_ X-MS-Office365-Filtering-Correlation-Id: 898c4bba-39e3-4a93-9843-08df36ae0e5e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|23010399003|7416014|376014|1800799024|6133799003|18002099003|3023799007|56012099006|11063799006|5023799004|261026140227099003|261026121527099003|261028144727099003|261021123027099003|10067099003|261021121427099003|261022105027099003|261009223027099003; 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The series covers the UCF, PCIe, PCIe target, CPU memory latency, and chip-to-chip interconnect PMUs. It provides symbolic names for the raw event encodings and metrics for bandwidth, frequency, and average read latency. The PCIe and PCIe target PMUs are named nvidia_pcie_pmu__rc_ and nvidia_pcie_tgt_pmu__rc_. Their json Unit uses the existing comma-separated form ("nvidia_pcie_pmu_,rc_"), but perf only merged instances that differ in the trailing number, so these events and metrics gave one result per socket and were reported incorrectly (e.g. with --metric-only), as discussed in v1. Patches 6-9 fix this: - Patch 6 adds a check of the cpumasks of all merged PMU instances to the zero-count skip in perf stat, so a socket that counts nothing shows 0 instead of having its row hidden. - Patch 7 merges PMU instances that match the same comma-separated json Unit. This also applies to the HiSilicon hisi_sccl PMUs, which use the same json form; not tested on HiSilicon hardware. - Patch 8 labels a merged uncore counter after all of its PMUs, e.g. nvidia_pcie_pmu_*_rc_*/cycles/ or nvidia_ucf_pmu/cycles/, instead of after the first instance, such as nvidia_pcie_pmu_0_rc_0/cycles/. Output with --no-aggr is unchanged. - Patch 9 describes these PMU names in the ABI document. Changes in v2: - Move the uncore JSON out of the sys directory and remove the "Compat" fields. Thanks to Ian Rogers for the feedback. - Drop "perf jevents: Process model files before sys subdirectories", which this series no longer needs. - Add UCF SLC and memory bandwidth metrics from all sources to local CMEM (read, write and read+write) and from local sources to local CMEM and to remote memory, PCIe bandwidth metrics to local destinations, and read+write bandwidth metrics for UCF SLC, UCF memory and PCIe. Thanks to Chun-Tse Shao for the suggestion. - Add patches 6-9 to fix the PCIe instance aggregation. Thanks to Ian Rogers and Chun-Tse Shao for the pointers. v1: https://lore.kernel.org/all/20261019164241.403644-1-bwicaksono@nvidia.com/ Besar Wicaksono (9): perf jevents: Add support for NVIDIA Tegra410 UCF PMU aliasing perf jevents: Add support for NVIDIA Tegra410 PCIE PMU aliasing perf jevents: Add support for NVIDIA Tegra410 PCIE-TGT PMU aliasing perf jevents: Add support for NVIDIA Tegra410 CPU Memory Latency PMU aliasing perf jevents: Add support for NVIDIA Tegra410 C2C PMU aliasing perf stat: Check merged PMU instance's cpumasks when skipping zero counts perf pmu: Merge PMU instances that match the same comma-separated json Unit perf evsel: Name a merged uncore counter after all of its PMUs perf Documentation: Describe PMU names numbered in more than one place .../testing/sysfs-bus-event_source-devices | 14 + .../arm64/nvidia/t410/uncore-cpu_mem.json | 43 + .../arm64/nvidia/t410/uncore-nvclink.json | 67 ++ .../arm64/nvidia/t410/uncore-nvdlink.json | 43 + .../arm64/nvidia/t410/uncore-nvlink_c2c.json | 115 +++ .../arch/arm64/nvidia/t410/uncore-pcie.json | 249 ++++++ .../arm64/nvidia/t410/uncore-pcie_tgt.json | 83 ++ .../arch/arm64/nvidia/t410/uncore-ucf.json | 764 ++++++++++++++++++ tools/perf/tests/pmu.c | 134 +++ tools/perf/util/evlist.c | 2 +- tools/perf/util/evsel.c | 83 +- tools/perf/util/evsel.h | 2 +- tools/perf/util/parse-events.c | 2 +- tools/perf/util/pmu.c | 65 ++ tools/perf/util/pmu.h | 9 + tools/perf/util/pmus.c | 47 ++ tools/perf/util/pmus.h | 1 + tools/perf/util/stat-display.c | 20 + 18 files changed, 1737 insertions(+), 6 deletions(-) create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-cpu_mem.json create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-nvclink.json create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-nvdlink.json create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-nvlink_c2c.json create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-pcie.json create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-pcie_tgt.json create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-ucf.json -- 2.43.0