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From: James Fantin-Hardesty <james.fantin-hardesty@seagate.com>
To: linux-nvme@lists.infradead.org
Cc: Christoph Hellwig <hch@lst.de>, Sagi Grimberg <sagi@grimberg.me>,
	Chaitanya Kulkarni <kch@nvidia.com>,
	Damien Le Moal <dlemoal@kernel.org>,
	linux-kernel@vger.kernel.org,
	James Fantin-Hardesty <james.fantin-hardesty@seagate.com>
Subject: [PATCH] nvmet: fix arbitration burst field mask
Date: Fri, 30 Oct 2026 13:18:53 -0600	[thread overview]
Message-ID: <20261030191853.1777683-1-james.fantin-hardesty@seagate.com> (raw)

The Arbitration Burst (AB) field of the Arbitration feature is
CDW11 bits 2:0 (NVMe Base Specification 2.1, Feature 01h), but
nvmet incorrectly masks it with 0x3. Use 0x7 for both set and get.

Fixes: a0ed77d4c9a7 ("nvmet: Implement arbitration feature support")
Signed-off-by: James Fantin-Hardesty <james.fantin-hardesty@seagate.com>
---
 drivers/nvme/target/admin-cmd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/nvme/target/admin-cmd.c b/drivers/nvme/target/admin-cmd.c
index 26028be8fe4d..6cb59a4f233c 100644
--- a/drivers/nvme/target/admin-cmd.c
+++ b/drivers/nvme/target/admin-cmd.c
@@ -1326,7 +1326,7 @@ static u16 nvmet_set_feat_arbitration(struct nvmet_req *req)
 		.hpw = (cdw11 >> 24) & 0xff,
 		.mpw = (cdw11 >> 16) & 0xff,
 		.lpw = (cdw11 >> 8) & 0xff,
-		.ab = cdw11 & 0x3,
+		.ab = cdw11 & 0x7,
 	};
 
 	if (!ctrl->ops->set_feature) {
@@ -1481,7 +1481,7 @@ static u16 nvmet_get_feat_arbitration(struct nvmet_req *req)
 			 ((u32)arb.hpw << 24) |
 			 ((u32)arb.mpw << 16) |
 			 ((u32)arb.lpw << 8) |
-			 (arb.ab & 0x3));
+			 (arb.ab & 0x7));
 
 	return NVME_SC_SUCCESS;
 }
-- 
2.56.0


             reply	other threads:[~2026-10-30 19:19 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-30 19:18 James Fantin-Hardesty [this message]
2026-11-03  5:12 ` Damien Le Moal
2026-11-03  5:34 ` Christoph Hellwig

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