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[67.168.198.145]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ae8454327esm5313204a91.4.2026.10.30.14.32.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 14:32:58 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Jianfeng Liu , =?UTF-8?q?Christian=20K=C3=B6nig?= , Dmitry Baryshkov , Rob Clark , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v4 2/6] drm/msm/gem: dma_map/unmap_sgtable() Date: Fri, 30 Oct 2026 14:32:44 -0700 Message-ID: <20261030213251.55365-3-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261030213251.55365-1-robin.clark@oss.qualcomm.com> References: <20261030213251.55365-1-robin.clark@oss.qualcomm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMwMDA4NSBTYWx0ZWRfX2U3M5R2Jocoe kXELTBI9wvTSPV/zqG3yrlMQ+nGN2wTcVpROa36bcTTLhxhGdJc5vfGdm4gxyOBwThBTIq1p9yB w20H+IicteKnDMm/UwbLP77yP0I1/6A= X-Authority-Analysis: v=2.4 cv=d4xgWhjE c=1 sm=1 tr=0 ts=6ae50d0c cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=6Rn/7xRx7Ub4NEhlm8k1cw==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=urFl2zf4nAXEHr-h338A:9 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMwMDA4NSBTYWx0ZWRfX8dasJGmjxGq6 mN4tukmdnWxIRgaEAXmLfYsrlXY/ZfT+iLjt1qq1mqHhz8qHnWA+Ep9vnMJ/jB66aYONNBcgnY7 mQfCuRqq9C5FcxTlB3ZhOm7/yKEysxd8++JG/BQThrXSTKcNlN9SdlZAlJeG5Imq7uGxyTQDLWD 7GCLAa69l3tjd1LNCMvkrfPulHrozTDMvqYXYWGFUmDakOkZ4WAvLjF8SKFIBlABdfWOoS8uT6Y 1GeQGUQ6bfqBhckKLGiSPpwrEEfenBK/7ucqfIQb9HWdUZ59+EK+DDgSg2o6rlEseuaR7VCac8o I1WEOhQqGS1dugA9bnhVbz2RY5yza+vZUZnLm67ehefS/m7eJ4OMy1wDMbqwPbQuNAph+8OOfON Jj8XTeY7Vy3jIy8KuCX2pajEZdWZ2ujpflPljX1D8emnv5+iG8JIGv9xkXy90IYXxb0YofRNo4M JQeleSs3ioPwpYLnE/Q== X-Proofpoint-ORIG-GUID: VQ1H8Ol3F0c1na2i0BiJwClGGt4OwuNb X-Proofpoint-GUID: VQ1H8Ol3F0c1na2i0BiJwClGGt4OwuNb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-30_06,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 impostorscore=0 spamscore=0 suspectscore=0 malwarescore=0 clxscore=1015 phishscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2610300085 This should functionally be a no-op for us, since we are managing our SMMU directly (dma_map_ops is NULL), but it populates the dma_len/ dma_address's so that we can use them for setting up pgtable mappings. This inlines sync_for_device() and sync_for_cpu() into their only callers to avoid doubling up on the dma-mapping calls. Tested-by: Jianfeng Liu # x1e78100 (Acer SFA14-11), v7.3-rc5 + this series, CONFIG_DMABUF_DEBUG=y Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gem.c | 65 +++++++++++++++-------------------- 1 file changed, 28 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index 181b9ad32672..bcdb57866cf6 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -116,34 +116,6 @@ void msm_gem_vma_put(struct drm_gem_object *obj) #endif } -/* - * Cache sync.. this is a bit over-complicated, to fit dma-mapping - * API. Really GPU cache is out of scope here (handled on cmdstream) - * and all we need to do is invalidate newly allocated pages before - * mapping to CPU as uncached/writecombine. - * - * On top of this, we have the added headache, that depending on - * display generation, the display's iommu may be wired up to either - * the toplevel drm device (mdss), or to the mdp sub-node, meaning - * that here we either have dma-direct or iommu ops. - * - * Let this be a cautionary tail of abstraction gone wrong. - */ - -static void sync_for_device(struct msm_gem_object *msm_obj) -{ - struct device *dev = msm_obj->base.dev->dev; - - dma_map_sgtable(dev, msm_obj->sgt, DMA_BIDIRECTIONAL, 0); -} - -static void sync_for_cpu(struct msm_gem_object *msm_obj) -{ - struct device *dev = msm_obj->base.dev->dev; - - dma_unmap_sgtable(dev, msm_obj->sgt, DMA_BIDIRECTIONAL, 0); -} - static void update_lru_active(struct drm_gem_object *obj) { struct msm_drm_private *priv = obj->dev->dev_private; @@ -201,6 +173,7 @@ static struct page **get_pages(struct drm_gem_object *obj) struct drm_device *dev = obj->dev; struct page **p; size_t npages = obj->size >> PAGE_SHIFT; + unsigned map_attrs = DMA_ATTR_SKIP_CPU_SYNC; p = drm_gem_get_pages(obj); @@ -219,13 +192,20 @@ static struct page **get_pages(struct drm_gem_object *obj) goto error; } - update_device_mem(dev->dev_private, obj->size); - - /* For non-cached buffers, ensure the new pages are clean - * because display controller, GPU, etc. are not coherent: - */ + /* For non-cached buffers, ensure the new pages are clean. */ if (msm_obj->flags & MSM_BO_WC) - sync_for_device(msm_obj); + map_attrs = 0; + + ret = dma_map_sgtable(drm_dev_dma_dev(obj->dev), + msm_obj->sgt, + DMA_BIDIRECTIONAL, + map_attrs); + if (ret) { + DRM_DEV_ERROR(dev->dev, "could not map sgtable: %d\n", ret); + goto error; + } + + update_device_mem(dev->dev_private, obj->size); update_lru(obj); } @@ -233,6 +213,11 @@ static struct page **get_pages(struct drm_gem_object *obj) return msm_obj->pages; error: + if (!IS_ERR(msm_obj->sgt)) { + sg_free_table(msm_obj->sgt); + kfree(msm_obj->sgt); + msm_obj->sgt = NULL; + } msm_obj->sgt = NULL; drm_gem_put_pages(obj, msm_obj->pages, false, false); @@ -253,12 +238,18 @@ static void put_pages(struct drm_gem_object *obj) drm_gpuvm_bo_gem_evict(obj, true); if (msm_obj->pages) { + unsigned unmap_attrs = DMA_ATTR_SKIP_CPU_SYNC; + /* For non-cached buffers, ensure the new - * pages are clean because display controller, - * GPU, etc. are not coherent: + * pages are clean: */ if (msm_obj->flags & MSM_BO_WC) - sync_for_cpu(msm_obj); + unmap_attrs = 0; + + dma_unmap_sgtable(drm_dev_dma_dev(obj->dev), + msm_obj->sgt, + DMA_BIDIRECTIONAL, + unmap_attrs); sg_free_table(msm_obj->sgt); kfree(msm_obj->sgt); -- 2.56.0