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Sat, 31 Oct 2026 06:23:17 -0700 (PDT) Received: from hu-gkohli-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1ac193b8179sm18234699c88.11.2026.10.31.06.23.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Oct 2026 06:23:17 -0700 (PDT) From: Gaurav Kohli Date: Sat, 31 Oct 2026 18:52:47 +0530 Subject: [PATCH v2 1/6] dt-bindings: thermal: thermal-zones: add hardware-binning trip properties X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261031-thermal_bin-v2-1-d76fd073ae98@oss.qualcomm.com> References: <20261031-thermal_bin-v2-0-d76fd073ae98@oss.qualcomm.com> In-Reply-To: <20261031-thermal_bin-v2-0-d76fd073ae98@oss.qualcomm.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , Shuah Khan , Randy Dunlap , Amit Kucheria , Thara Gopinath , Bjorn Andersson , Konrad Dybcio , Abel Vesa Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Gaurav Kohli , Amit Kucheria X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1793452983; l=4695; i=gaurav.kohli@oss.qualcomm.com; s=20260302; h=from:subject:message-id; bh=ncFZPtnOUeeKhOPBeq8g6g1+nKJHU1t/0jL31m8J8Cc=; b=Tm+Ia+SgoeDa5fXtBbi5k9T80BKfPWtqz/KtX4cC0D1IO54QiUL7nDXJbvoVFK+i6miQ3IKAZ 7TfNxEHrpxNDP2eKFgG7ZOW0akgtPOifXwZsuyY9l6FyKg9q021MnO8 X-Developer-Key: i=gaurav.kohli@oss.qualcomm.com; a=ed25519; pk=IdNsqe8rWsF6dbpGHfwPEH9zM0nbOdRH72HxUT9qPak= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMxMDA1MyBTYWx0ZWRfXy+0PPD4HDTol HfCivNeQNgyuQpZ7JSvCMsUrr0V4bCedy1lYMhimxZPH7weCYHN7VByzGLqKk0l4I/V4zmPFuOe 8c9IzjnK5I1HTEATon7aD07SQ2ipRkXfZSlP0Y9uOH7l4wnGylXi2/8Z5vwxDsMPh0WfGwshNMt lvOT9dow62YI79FaTVn8pqAOCKolqEJSk5H8K3yX2zuFAXzCkLo7PwIIPeL7wWfLl52FVSqoKB8 TGb3TaDE5svlu31a8GJxQkIEyT/IdyL3hG4b4nXGHyHI6SBoGf4kON4W1f14DQG5kDrGwMmbIKc IMBMnyDFBTTAXws2TfJ9dzeqDN7LSLPZKWdUg9mKc72dFtLRrjOHRtg+xmjt4JDb0hrRscPsizE 8/6Dvm0WNDnSxGXYEYcGKar7x9GGfgQbRzGy1VvDoBBvrnQX/ym9RHgJHIRkJ1xdJ4TuS1KYvqE /b0ubvztHRhujlIDZoQ== X-Authority-Analysis: v=2.4 cv=FciiV5+6 c=1 sm=1 tr=0 ts=6ae5ebc7 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=j3Ouay22MIlEJhTpI7oA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-ORIG-GUID: b6VBjbqeQ9P_aTAaq6GPiWzf0Su1vwkQ X-Proofpoint-GUID: b6VBjbqeQ9P_aTAaq6GPiWzf0Su1vwkQ X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMxMDA1MyBTYWx0ZWRfX/MLz5if0uzhW 8C+0nzg9/Q+MacS/ZprNtS7uCrp4OjLa7KiWDqtCo256KpqIKp2Q90MvmD3kv88zZFANNHUbKOn vF7rJcOf67tzIK+9S429IMzauSgqD7Y= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-31_03,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 impostorscore=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 adultscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2610310053 From: Amit Kucheria Differences in SoC packaging can be used to provide multiple SoC SKUs at different thermal and performance characteristics. The underlying SoC remains the same except for how much heat the packaging can dissipate, thereby influencing the critical trip point at which an SoC SKU needs to be throttled. This SKU-specific data is typically burned into fuses during manufacturing and can be read back at runtime. Add two optional trip-point properties to describe this: - 'temperature-bin': an array of per-bin trip temperatures, used instead of 'temperature' when the trip depends on the hardware revision encoded in fuses. - 'thermal-hw-bin': one or more bitmask groups describing the hardware revisions for which a trip point is valid, modeled on the 'opp-supported-hw' property of the OPP framework. Signed-off-by: Amit Kucheria Signed-off-by: Gaurav Kohli --- .../devicetree/bindings/thermal/thermal-zones.yaml | 57 +++++++++++++++++++++- 1 file changed, 56 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/thermal/thermal-zones.yaml b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml index 999ad40a20d5..62590dfc77bf 100644 --- a/Documentation/devicetree/bindings/thermal/thermal-zones.yaml +++ b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml @@ -152,6 +152,55 @@ patternProperties: situation where the trip gets constantly triggered soon after cooling action is removed. + temperature-bin: + $ref: /schemas/types.yaml#/definitions/int32-array + items: + minimum: -273000 + maximum: 200000 + description: | + An array of integers expressing trip temperatures in + millicelsius, one entry per hardware bin sub-group defined + in the thermal-hw-bin property. Each value is the trip + temperature for the corresponding hardware bin. + + Use this property instead of 'temperature' when the trip + temperature depends on the SoC hardware revision as encoded + in fuse values. The platform driver reads the fuse and + registers the hardware-version bitfields with the thermal + zone; the framework then selects the matching entry. + + Exactly one of 'temperature' or 'temperature-bin' must be + present in each trip node. + + thermal-hw-bin: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: | + Optional bitmask(s) describing the hardware revisions for + which this trip point is valid. + + Uses the same format and semantics as the opp-supported-hw + property in the OPP framework. The platform provides N + 32-bit values describing the hardware it is running on. + Each trip node may provide one or more groups of N 32-bit + mask values. + + The total number of 32-bit cells must be a multiple of N. + Each contiguous group of N cells forms a sub-group. A + sub-group matches if, for all i in [0 .. N-1], the bitwise + AND of the i-th mask and the i-th platform hardware value + is non-zero. The trip point is enabled if any sub-group + matches. If multiple sub-groups match, the first matching + sub-group selects the corresponding temperature-bin entry. + + When used together with 'temperature-bin', the number of + sub-groups must equal the number of entries in + 'temperature-bin'. + + If absent, the trip point is valid for all hardware. + items: + minItems: 1 + maxItems: 4 + type: $ref: /schemas/types.yaml#/definitions/string enum: @@ -179,8 +228,14 @@ patternProperties: The active trip type can be used to control other HW to help in cooling e.g. fans can be sped up or slowed down + oneOf: + - required: + - temperature + - required: + - temperature-bin + dependentRequired: + temperature-bin: [thermal-hw-bin] required: - - temperature - hysteresis - type -- 2.34.1