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Fri, 30 Oct 2026 20:42:06 -0700 (PDT) Received: from asahi.tail4da9e3.ts.net ([218.48.198.193]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a42662f23sm14255325eec.2.2026.10.30.20.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 20:42:06 -0700 (PDT) From: "Baek Kyu, Kim" To: Bjorn Helgaas Cc: "Baek Kyu, Kim" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] PCI: Do not cache Immediate Readiness from a failed config read Date: Sat, 31 Oct 2026 12:42:01 +0900 Message-ID: <20261031034201.161511-1-pocj8ur4in@gmail.com> X-Mailer: git-send-email 2.55.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit pci_imm_ready_init() uses PCI_STATUS even if pci_read_config_word() fails. The failed access leaves an all-ones response, whose Immediate Readiness bit is set. A later FLR then skips the wait even after config space has become accessible again, so early config restoration can be lost. Leave imm_ready clear when the read fails or returns all ones. Keep the existing fast path for a valid status that advertises Immediate Readiness. Fixes: d6112f8def51 ("PCI: Add support for Immediate Readiness") Signed-off-by: Baek Kyu, Kim --- An arm64 QEMU kernel used the PCI core enumeration and FLR paths with a synthetic endpoint. With one injected initial PCI_STATUS read failure, the baseline cached imm_ready=1 and restored config immediately; the endpoint dropped the writes. The change kept imm_ready=0, waited 103 ms, and restored the config value. No physical endpoint was tested. drivers/pci/probe.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 27008e2ea5af..eb4e17ebd055 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2642,7 +2642,10 @@ static void pci_imm_ready_init(struct pci_dev *dev) { u16 status; - pci_read_config_word(dev, PCI_STATUS, &status); + if (pci_read_config_word(dev, PCI_STATUS, &status) || + PCI_POSSIBLE_ERROR(status)) + return; + if (status & PCI_STATUS_IMM_READY) dev->imm_ready = 1; } -- 2.55.0