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From: Egor Perevoshchikov <rickbatra0z@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: "Egor Perevoshchikov" <rickbatra0z@gmail.com>,
	"Harry Wentland" <harry.wentland@amd.com>,
	"Leo Li" <sunpeng.li@amd.com>,
	"Rodrigo Siqueira" <siqueira@igalia.com>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	"Mario Limonciello" <mario.limonciello@amd.com>,
	"Ray Wu" <ray.wu@amd.com>
Subject: [PATCH] drm/amd/display: Restore PSR-SU guard in power module
Date: Sat, 31 Oct 2026 07:00:50 +0300	[thread overview]
Message-ID: <20261031040051.46100-1-rickbatra0z@gmail.com> (raw)

Commit a5ce8695d6d1 ("drm/amd/display: Avoid configuring PSR granularity
if PSR-SU not supported") restricted DSC slice-height configuration to
PSR-SU. The power-module integration removed that guarded caller. Its
replacement in mod_power_psr_notify_mode_change() calls
psr_su_set_dsc_slice_height() unconditionally and ignores its return value.

On PSR1 links with a DSC slice configuration, this applies a PSR-SU-only
alignment check even though selective update is not enabled. If the
calculated DSC slice height is not a multiple of the nonzero advertised
SU Y granularity, the helper triggers an assertion. It also sets
dsc_slice_height before failing the check, so the caller passes this
SU-specific value into PSR1 setup despite the failure.

Restore the PSR version guard and failure handling in the new caller.
PSR1 proceeds with the zero-initialized DSC slice height, while PSR-SU
retains its alignment validation and stops setup if that validation fails.

Fixes: 3c108046e1d6 ("drm/amd/display: Add power module on Linux")
Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/3027
Cc: stable@vger.kernel.org
Assisted-by: LLM
Signed-off-by: Egor Perevoshchikov <rickbatra0z@gmail.com>
---
Tested on a Xiaomi Redmi Book Pro 15 2023 (TM2209), Ryzen 7 7840HS /
Radeon 780M, BIOS RMAPH5B0P0909, with Linux 7.3.0 on NixOS.

The tested panel uses PSR1. Its 2000-line mode has 16 vertical DSC slices,
giving a slice height of 125, which is not a multiple of its advertised
SU Y granularity of 4.

Before the patch, boot produced:

  WARNING: .../display/modules/power/power_psr.c:666
    psr_su_set_dsc_slice_height+0x7e/0xa0 [amdgpu]
    mod_power_psr_notify_mode_change+0x1b7/0x270 [amdgpu]
    mod_power_notify_mode_change+0x160/0x1d0 [amdgpu]

After rebuilding and booting with the patch, that warning is absent.
With VRR disabled, repeated debugfs reads report psr_state=6 (PSR_STATE3)
both with and without the patch. PSR remains functional in both cases.

The older dsc2_disable warning in #3027 is no longer reproduced on this
kernel. This patch addresses the remaining psr_su_set_dsc_slice_height
warning; it does not modify the dsc2_disable path.

The patch is based on the mainline v7.3 release:
  c03c1a14507dfaf8b856c2608f9ac216021fc222
This matches the kernel release used for hardware testing. The original
power_psr.c is identical to the Linux 7.3 source used for the
hardware-tested patch.
The patch also applies to drm-next-2026-10-31:
  f94ed3d7cba3c83eef50b1a96d630d63cf54f69c

Additional validation covered eight cases in an isolated C harness using
the actual setup and slice-height functions with hardware calls stubbed.
The original PSR1 warning was reproduced; the patch avoids it, retains
valid PSR-SU setup, and prevents setup after failed SU alignment
validation.
The patched translation unit was also compiled against Linux 7.3 headers.
PSR-SU behavior has not been tested on PSR-SU-capable hardware.

LLM assistance: source history tracing; stubbed software tests; submission
checks.

 drivers/gpu/drm/amd/display/modules/power/power_psr.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/modules/power/power_psr.c b/drivers/gpu/drm/amd/display/modules/power/power_psr.c
index 96bb77fff05..7139395b5c0 100644
--- a/drivers/gpu/drm/amd/display/modules/power/power_psr.c
+++ b/drivers/gpu/drm/amd/display/modules/power/power_psr.c
@@ -94,9 +94,12 @@ bool mod_power_psr_notify_mode_change(struct mod_power *mod_power,
 	 * The value of DSC slice height is determined in DSC Driver but it does not
 	 * propagated out here, so we need to calculate it as below 'slice_height'.
 	 */
-	psr_su_set_dsc_slice_height(dc, link,
-				(struct dc_stream_state *) stream,
-				&psr_config);
+	if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) {
+		if (!psr_su_set_dsc_slice_height(dc, link,
+						 (struct dc_stream_state *)stream,
+						 &psr_config))
+			return false;
+	}

 	dc_link_setup_psr(link, stream, &psr_config, &psr_context);


base-commit: c03c1a14507dfaf8b856c2608f9ac216021fc222
--
2.56.0


                 reply	other threads:[~2026-10-31  4:01 UTC|newest]

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