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Sun, 01 Nov 2026 10:57:55 -0800 (PST) Received: from hp ([71.12.40.102]) by smtp.gmail.com with ESMTPSA id 00721157ae682-8b2b716d420sm40869397b3.33.2026.11.01.10.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Nov 2026 10:57:54 -0800 (PST) From: Tim Michals To: Jassi Brar , Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-sunxi@lists.linux.dev, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tim Michals Subject: [PATCH v3 5/7] arm64: dts: allwinner: a523: Add message box and remoteproc nodes Date: Sun, 1 Nov 2026 12:57:33 -0600 Message-ID: <20261101185735.762559-6-tcmichals@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261101185735.762559-1-tcmichals@gmail.com> References: <20261101185735.762559-1-tcmichals@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the message box node, with its four register banks, bank clocks and resets, bank interrupts, and the XuanTie E906 remoteproc node, with the MCU CCU clocks and resets, the RISC-V and SRAM power domains and message box channel 9. The remoteproc node is disabled; a board enables it together with its firmware name and reserved memory regions. Signed-off-by: Tim Michals --- Changes in v3: - Message box: all four banks with their clocks and resets; the DSP and CPUS bank addresses were swapped in v2; remote bank interrupts corrected to SPI 181/174/205 - Message box: interrupt-names - Remoteproc: debug reset, RISC-V and SRAM power domains, one message box channel; the message box clock and reset moved to the message box node; reg-names sram-a3-0 and sram-a3-1 --- .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index 85ef492ffeae..316698b999c6 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -605,6 +605,31 @@ dma: dma-controller@3002000 { #dma-cells = <1>; }; + msgbox: mailbox@3003000 { + compatible = "allwinner,sun55i-a523-msgbox"; + reg = <0x03003000 0x1000>, + <0x07120000 0x1000>, + <0x07094000 0x1000>, + <0x07136000 0x1000>; + reg-names = "arm", "dsp", "cpus", "rv"; + clocks = <&ccu CLK_BUS_MSGBOX>, + <&mcu_ccu CLK_BUS_MCU_DSP_MSGBOX>, + <&r_ccu CLK_BUS_R_MSGBOX>, + <&mcu_ccu CLK_BUS_MCU_RISCV_MSGBOX>; + clock-names = "arm", "dsp", "cpus", "rv"; + resets = <&ccu RST_BUS_MSGBOX>, + <&mcu_ccu RST_BUS_MCU_DSP_MSGBOX>, + <&r_ccu RST_BUS_R_MSGBOX>, + <&mcu_ccu RST_BUS_MCU_RISCV_MSGBOX>; + reset-names = "arm", "dsp", "cpus", "rv"; + interrupts = , + , + , + ; + interrupt-names = "arm", "dsp", "cpus", "rv"; + #mbox-cells = <1>; + }; + sid: efuse@3006000 { compatible = "allwinner,sun55i-a523-sid", "allwinner,sun50i-a64-sid"; @@ -1144,5 +1169,27 @@ npu: npu@7122000 { resets = <&mcu_ccu RST_BUS_MCU_NPU>; power-domains = <&ppu PD_NPU>; }; + + rproc: remoteproc@7130000 { + compatible = "allwinner,sun55i-a523-rproc"; + reg = <0x07130000 0x1000>, + <0x07280000 0x40000>, + <0x072c0000 0x40000>, + <0x07010364 0x4>; + reg-names = "cfg", "sram-a3-0", "sram-a3-1", "remap"; + clocks = <&mcu_ccu CLK_BUS_MCU_RISCV_CFG>, + <&mcu_ccu CLK_MCU_RISCV>, + <&mcu_ccu CLK_BUS_MCU_PUBSRAM>; + clock-names = "bus", "core", "sram"; + resets = <&mcu_ccu RST_BUS_MCU_RISCV_CFG>, + <&mcu_ccu RST_BUS_MCU_RISCV_CORE>, + <&mcu_ccu RST_BUS_MCU_PUBSRAM>, + <&mcu_ccu RST_BUS_MCU_RISCV_DEBUG>; + reset-names = "cfg", "core", "sram", "debug"; + power-domains = <&ppu PD_RISCV>, <&ppu PD_SRAM>; + power-domain-names = "riscv", "sram"; + mboxes = <&msgbox 9>; + status = "disabled"; + }; }; }; -- 2.53.0