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Sun, 01 Nov 2026 12:03:16 -0800 (PST) Received: from ryzen.lan ([2601:644:8000:37f::e34]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a5eee0f20sm10561680eec.17.2026.11.01.12.03.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Nov 2026 12:03:15 -0800 (PST) From: Rosen Penev To: linux-spi@vger.kernel.org Cc: Mark Brown , Boris Brezillon , Mauro Lima , Andy Shevchenko , Tudor Ambarus , Lee Jones , linux-kernel@vger.kernel.org (open list) Subject: [PATCH] spi: intel: only check locked opmenu for SW sequencer operations Date: Sun, 1 Nov 2026 12:03:13 -0800 Message-ID: <20261101200313.16411-1-rosenp@gmail.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On controllers that use the software sequencer for register access (LPT and BYT), intel_spi_supports_mem_op() rejects any operation whose opcode is not in the BIOS-locked OPMENU. However the check is applied to every operation, including normal data reads and writes which are always executed by the hardware sequencer and never consult the OPMENU. On a Dell Precision M4800 (Lynx Point) the BIOS locks OPMENU to {02, 3b, 20, 05, 9f, 9f, 00, 00}, which lacks both READ (0x03) and FAST_READ (0x0b). As a result every read op is rejected and spi-nor fails to probe both flash components: intel-spi intel-spi: 0x3 not supported intel-spi intel-spi: 0xb not supported spi-nor spi0.0: can't select read settings supported by both the SPI controller and memory. spi-nor spi0.0: probe with driver spi-nor failed with error -22 Only enforce the OPMENU check for operations that actually go through the software sequencer: register reads/writes when swseq_reg is set and erase when swseq_erase is set. With this both flash chips (W25Q64 and W25Q32) probe and read back correctly. Fixes: e23e5a05d1fd ("mtd: spi-nor: intel-spi: Convert to SPI MEM") Signed-off-by: Rosen Penev --- drivers/spi/spi-intel.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-intel.c b/drivers/spi/spi-intel.c index 7494b921a743..6f1414b199e6 100644 --- a/drivers/spi/spi-intel.c +++ b/drivers/spi/spi-intel.c @@ -754,6 +754,18 @@ intel_spi_match_mem_op(struct intel_spi *ispi, const struct spi_mem_op *op) return NULL; } +static bool intel_spi_op_uses_swseq(const struct intel_spi *ispi, + const struct intel_spi_mem_op *iop) +{ + if (iop->exec_op == intel_spi_read_reg || + iop->exec_op == intel_spi_write_reg) + return ispi->swseq_reg; + if (iop->exec_op == intel_spi_erase) + return ispi->swseq_erase; + /* Data reads and writes always use the HW sequencer */ + return false; +} + static bool intel_spi_supports_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { @@ -768,9 +780,11 @@ static bool intel_spi_supports_mem_op(struct spi_mem *mem, /* * For software sequencer check that the opcode is actually - * present in the opmenu if it is locked. + * present in the opmenu if it is locked. Operations executed by + * the hardware sequencer do not use the opmenu so skip the check + * for them. */ - if (ispi->swseq_reg && ispi->locked) { + if (ispi->locked && intel_spi_op_uses_swseq(ispi, iop)) { int i; /* Check if it is in the locked opcodes list */ -- 2.56.0