From: Junyi Zhao via B4 Relay <devnull+junyi.zhao.amlogic.com@kernel.org>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Frank Li <Frank.Li@nxp.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Kees Cook <kees@kernel.org>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>
Cc: linux-i3c@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, imx@lists.linux.dev,
linux-hardening@vger.kernel.org, xianwei.zhao@amlogic.com,
Kelvin.Zhang@amlogic.com, Junyi Zhao <junyi.zhao@amlogic.com>
Subject: [PATCH v2 2/2] dt-bindings: i3c: silvaco,i3c-master: Add Amlogic A9 support
Date: Mon, 02 Nov 2026 19:05:40 +0800 [thread overview]
Message-ID: <20261102-a9_i3c-v2-2-0c474bfccffa@amlogic.com> (raw)
In-Reply-To: <20261102-a9_i3c-v2-0-0c474bfccffa@amlogic.com>
From: Junyi Zhao <junyi.zhao@amlogic.com>
Amlogic A9 SoCs integrate the Silvaco I3C IP with two controller
instances:
- amlogic,a9-i3c for the EE domain, which takes two clocks,
"pclk" and "fast_clk" like the NXP variants;
- amlogic,a9-ao-i3c for the Always-On (AO) domain, which exposes
only "pclk": its bus clock is generated by an internal divider
located in the controller's own register space.
Allow both compatibles with the "silvaco,i3c-master-v1" fallback and
enforce the per-variant clock counts.
Signed-off-by: Junyi Zhao <junyi.zhao@amlogic.com>
---
.../bindings/i3c/silvaco,i3c-master.yaml | 24 ++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
index 853092f75..de1fdec65 100644
--- a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
+++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
@@ -19,6 +19,8 @@ properties:
- enum:
- nxp,imx94-i3c
- nxp,imx95-i3c
+ - amlogic,a9-i3c
+ - amlogic,a9-ao-i3c
- const: silvaco,i3c-master-v1
reg:
@@ -28,14 +30,14 @@ properties:
maxItems: 1
clocks:
- minItems: 2
+ minItems: 1
items:
- description: system clock
- description: bus clock
- description: other (slower) events clock
clock-names:
- minItems: 2
+ minItems: 1
items:
- const: pclk
- const: fast_clk
@@ -72,12 +74,30 @@ allOf:
enum:
- nxp,imx94-i3c
- nxp,imx95-i3c
+ - amlogic,a9-i3c
then:
properties:
clocks:
+ minItems: 2
maxItems: 2
clock-names:
+ minItems: 2
maxItems: 2
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: amlogic,a9-ao-i3c
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ description:
+ The "ao" variant is the controller instance in the Always-On (AO)
+ domain, which has no separate bus clock and derives the
+ bus clock from an internal divider.
+ clock-names:
+ maxItems: 1
unevaluatedProperties: false
--
2.42.0
prev parent reply other threads:[~2026-11-02 11:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 11:05 [PATCH v2 0/2] Add Amlogic A9 I3C support Junyi Zhao via B4 Relay
2026-11-02 11:05 ` [PATCH v2 1/2] i3c: master: svc: Add amlogic a9 support Junyi Zhao via B4 Relay
2026-11-02 11:05 ` Junyi Zhao via B4 Relay [this message]
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