On Mon, Nov 02, 2026 at 03:17:24PM +0100, marouene.boubakri@oss.nxp.com wrote: > From: Marouene Boubakri > > The CVA6 APU is the FPGA SoC built around the OpenHW Group CVA6 core in > the CVA6 repository (corev_apu/fpga). Add the board compatible strings > for its Digilent Genesys 2 builds with the 32-bit (cv32a6) and the > 64-bit (cv64a6) configurations of the core. > > Signed-off-by: Marouene Boubakri > --- > .../bindings/riscv/openhwgroup.yaml | 30 +++++++++++++++++++ > 1 file changed, 30 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/openhwgroup.yaml > > diff --git a/Documentation/devicetree/bindings/riscv/openhwgroup.yaml b/Documentation/devicetree/bindings/riscv/openhwgroup.yaml > new file mode 100644 > index 0000000000..3bca66cad5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/riscv/openhwgroup.yaml > @@ -0,0 +1,30 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/riscv/openhwgroup.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: OpenHW Group SoC-based boards > + > +maintainers: > + - Marouene Boubakri > + > +description: > + OpenHW Group SoC-based boards. The CVA6 APU is the FPGA SoC built around > + the CVA6 core in the CVA6 repository (corev_apu/fpga). > + > +properties: > + $nodename: > + const: '/' > + compatible: > + oneOf: > + - description: CVA6 APU on the Digilent Genesys 2 board > + items: > + - enum: > + - openhwgroup,cv32a6-genesys2 > + - openhwgroup,cv64a6-genesys2 > + - const: openhwgroup,cva6-apu On riscv, the rule for platforms implemented on FPGAs is that they must be strictly versioned and match with some clear and obvious release from the vendor. In your case, this should be easy, because you have github releases of the platform to match with. pw-bot: changes-requested Thanks, Conor. > + > +additionalProperties: true > + > +... > -- > 2.43.0 >