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From: Alexandre Courbot <acourbot@nvidia.com>
To: Danilo Krummrich <dakr@kernel.org>,
	Alice Ryhl <aliceryhl@google.com>,
	 David Airlie <airlied@gmail.com>,
	Simona Vetter <simona@ffwll.ch>,
	 Benno Lossin <lossin@kernel.org>, Gary Guo <gary@garyguo.net>
Cc: John Hubbard <jhubbard@nvidia.com>,
	 Alistair Popple <apopple@nvidia.com>,
	Timur Tabi <ttabi@nvidia.com>,
	 Eliot Courtney <ecourtney@nvidia.com>,
	Zhi Wang <zhiw@nvidia.com>,
	 nova-gpu@lists.linux.dev, linux-kernel@vger.kernel.org,
	 rust-for-linux@vger.kernel.org,
	Alexandre Courbot <acourbot@nvidia.com>
Subject: [PATCH v2 0/5] gpu: nova-core: gsp: cmdq: preparatory changes for r000 support
Date: Mon, 02 Nov 2026 21:09:51 +0900	[thread overview]
Message-ID: <20261102-r000-cmdq-prep-v2-0-c2c2b69bdec0@nvidia.com> (raw)

This series contains patches 5, 6 and 8 from John's r000 series v3 [1]
that prepare the command queue so that the r000 switch applies more
cleanly. They are submitted separately to make review and merging
faster, and because they are also valuable even without the r000 switch.

Patch 1 is a drive-by fix of the `NV_PFSP` register declarations that is
included here as the `NV_PGSP` declarations mirror the `NV_PFSP` ones.
Patch 5 is another requirement for the r000 command queue.

No functional change is introduced by this series.

Applies cleanly on `drm-rust-next`, and runtime-tested successfully on
Ampere.

[1] https://lore.kernel.org/20260918010719.1176945-1-jhubbard@nvidia.com

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
Changes in v2:
- Add patch returning the sequence number of posted commands.
- Add `Fixes:` tag to patch 1. (Eliot)
- Deslop a couple of commit messages. (Eliot)
- Use I/O projections in the command queue. (Gary & Eliot)
- Link to v1: https://patch.msgid.link/20261030-r000-cmdq-prep-v1-0-f2befbcd8ba9@nvidia.com

---
Alexandre Courbot (2):
      gpu: nova-core: fix stride of NV_PFSP_* registers
      gpu: nova-core: gsp: cmdq: expose the sequence number of sent commands

John Hubbard (3):
      gpu: nova-core: regs: add msgq v2 BAR0 register declarations
      gpu: nova-core: gsp: cmdq: ring the GSP doorbell from the queue memory
      gpu: nova-core: gsp: cmdq: compute the queue regions from a count and a slot

 drivers/gpu/nova-core/gsp/cmdq.rs     | 187 ++++++++++++++++------------------
 drivers/gpu/nova-core/gsp/cmdq/rpc.rs |   4 +-
 drivers/gpu/nova-core/gsp/regs.rs     |  22 +++-
 drivers/gpu/nova-core/regs.rs         |   8 +-
 4 files changed, 118 insertions(+), 103 deletions(-)
---
base-commit: 9fe580fd90e20c8432832c5f9a7e92b049ae9af6
change-id: 20261030-r000-cmdq-prep-6c5644619c11

Best regards,
--  
Alexandre Courbot <acourbot@nvidia.com>


             reply	other threads:[~2026-11-02 12:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-02 12:09 Alexandre Courbot [this message]
2026-11-02 12:09 ` [PATCH v2 1/5] gpu: nova-core: fix stride of NV_PFSP_* registers Alexandre Courbot
2026-11-02 12:09 ` [PATCH v2 2/5] gpu: nova-core: regs: add msgq v2 BAR0 register declarations Alexandre Courbot
2026-11-02 12:09 ` [PATCH v2 3/5] gpu: nova-core: gsp: cmdq: ring the GSP doorbell from the queue memory Alexandre Courbot
2026-11-02 12:09 ` [PATCH v2 4/5] gpu: nova-core: gsp: cmdq: compute the queue regions from a count and a slot Alexandre Courbot
2026-11-02 13:27   ` Eliot Courtney
2026-11-02 12:09 ` [PATCH v2 5/5] gpu: nova-core: gsp: cmdq: expose the sequence number of sent commands Alexandre Courbot
2026-11-02 13:17   ` Eliot Courtney

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