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Miller" , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , "Russell King (Oracle)" , Nazim Amirul , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net] net: stmmac: dwmac-motorcomm: mask the MISC interrupt Date: Mon, 2 Nov 2026 05:09:38 -0300 Message-ID: <20261102080938.2955-1-magnusleatti@kernelriot.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit motorcomm_init() writes 0 to MGMT_INT_CTRL0, which unmasks the MISC interrupt. MISC arrives on MSI-X vector 5, which stmmac requests as its MAC interrupt, and nothing in stmmac clears it. The vendor driver masks it. Since commit 1b9707e6f1a9 ("net: stmmac: enable RPS and RBU interrupts"), heavy RX load sets MISC and it never clears again, even though every status register I could find reads zero. Vector 5 then fires about 120k times per second and the machine stops responding until the TX watchdog resets the adapter, or does not recover at all. A 64-byte UDP flood from another host is enough: iperf3 -c -u -b 0 -l 64 -R -P 4 -t 10 Mask MISC, as the vendor driver does. I could not find anything else that depends on it here: EEE is not supported, and Wake-on-LAN uses PME. Tested on one YT6801 board with net at cb284914e749. Without this patch the flood above hangs the board within a second. With it, no MAC interrupt fires under that flood or heavier ones, including after link, ring, MTU and speed changes and a module reload, and throughput is unchanged. Suspend could not be tested. The register values were read with a debug build of stmmac. Fixes: 02ff155ea281 ("net: stmmac: Add glue driver for Motorcomm YT6801 ethernet controller") Signed-off-by: Magnus Leatti --- Russell, d3265c19b35d ("net: stmmac: xgmac2: disable RBUE in default RX interrupt mask") describes a similar storm on xgmac2. Should dwmac4 do the same? I have only tested the glue change. drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c index 124fcd55a..610d533b9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c @@ -30,6 +30,7 @@ #define OOB_WOL_CTRL 0x1010 #define OOB_WOL_CTRL_DIS BIT(0) #define MGMT_INT_CTRL0 0x1100 +#define MGMT_INT_CTRL0_MASK_MISC BIT(21) #define INT_MODERATION 0x1108 #define INT_MODERATION_RX GENMASK(11, 0) #define INT_MODERATION_TX GENMASK(27, 16) @@ -172,7 +173,11 @@ static void motorcomm_reset(struct dwmac_motorcomm_priv *priv) static void motorcomm_init(struct dwmac_motorcomm_priv *priv) { - writel(0x0, priv->base + MGMT_INT_CTRL0); + /* + * Nothing services the MISC source, and once raised it never + * deasserts, so keep it masked. + */ + writel(MGMT_INT_CTRL0_MASK_MISC, priv->base + MGMT_INT_CTRL0); writel(FIELD_PREP(INT_MODERATION_RX, 200) | FIELD_PREP(INT_MODERATION_TX, 200), base-commit: cb284914e749388eef402938bdb3115fe1f6d337 -- 2.54.0