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Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by SG1PEPF000082E1.mail.protection.outlook.com (10.167.240.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.592.5 via Frontend Transport; Mon, 2 Nov 2026 08:41:54 +0000 Received: from JohnnyFan (unknown [172.21.64.24]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id A2D5E40920E1; Mon, 2 Nov 2026 16:41:53 +0800 (CST) From: "Johnny.Fan" To: will@kernel.org, mark.rutland@arm.com Cc: suzuki.poulose@arm.com, leo.yan@arm.com, jeremy.linton@arm.com, maz@kernel.org, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com, jie.fu@cixtech.com, bob.zhang@cixtech.com, "Johnny.Fan" , Fugang Duan Subject: [PATCH v3 1/2] perf: arm_pmu: Accept a per-device CPU mask from platform data Date: Mon, 2 Nov 2026 16:41:51 +0800 Message-ID: <20261102084153.3975282-2-johnny.fan@cixtech.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261102084153.3975282-1-johnny.fan@cixtech.com> References: <20261102084153.3975282-1-johnny.fan@cixtech.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG1PEPF000082E1:EE_|PUZPR06MB6005:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: ed9b2e39-3567-4e39-dfbd-08df38bd2641 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|7416014|376014|1800799024|82310400026|36860700016|56012099006|261009223027099003|261021123027099003|261021121427099003|261022075727099003|261026121527099003|10067099003|22082099003|18002099003|3023799007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: U/PEmN3Po6l/7JG/vEQUUYaEgYdZUGFBARH3URFMtYwH4RIB5R+GvtZipQWiRh4pi6EYhmvvb/DPTKmCqAOg/D6ltRDxY8U+i0XCuFEc7m13NtMabH0JMf4/NPkBA29dfmNVvpKVMpvgQvIi2lvShhsD1qMiQr/1NUqkbiV9dYNxjUcRtjZ/7S3G5hkWi9bxb19ZgwWhqgnj8utcue/CAtia8NiBjDwMJ8Ahp3JKSkVPRRfwvkkcJI7Jh4cAPzKt6s70eoh9eZ5aJHDGzMRVrRjrUxuEKed2jVyg3xe42AVp0lTuJmmH3x20ldq93ReLWqBujSCLsF8EtQrogOc8wKHVrRBLMJSWQf3cg7YdzfuT6J/U8hUMC9dXZTs7RTqshDRnNbR71038yTTqjT4usLOWmqgV9xv26kFk1WVJi9zz2a8seVeEahkPnOL6ha1c X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Nov 2026 08:41:54.6297 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ed9b2e39-3567-4e39-dfbd-08df38bd2641 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG1PEPF000082E1.apcprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PUZPR06MB6005 From: "Johnny.Fan" Synthetic platform devices created from ACPI data have no fwnode, so platform_get_irq_affinity() cannot tell which CPUs implement the feature and falls back to cpu_possible_mask. Add an optional CPU mask to the platform data and make both the SPE and the TRBE drivers prefer it over the firmware-described IRQ affinity. Device tree devices have no platform data and keep using the affinity. TRBE must also pass a stable copy of the mask to request_percpu_irq_affinity(), because supported_cpus is pruned as CPUs are probed, while the IRQ action keeps a pointer to the mask. This is a preparatory change: no ACPI device carries platform data yet, so behaviour is unchanged. Signed-off-by: Johnny.Fan Reviewed-by: Fugang Duan --- drivers/hwtracing/coresight/coresight-trbe.c | 22 +++++++++++++++++--- drivers/perf/arm_spe_pmu.c | 10 ++++++++- include/linux/perf/arm_pmu.h | 10 +++++++++ 3 files changed, 38 insertions(+), 4 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index c7cbca45f2de..0c4bc8fbcaf3 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -158,6 +158,7 @@ struct trbe_drvdata { struct hlist_node hotplug_node; int irq; cpumask_t supported_cpus; + cpumask_t irq_affinity; enum cpuhp_state trbe_online; struct platform_device *pdev; }; @@ -1533,6 +1534,8 @@ static void arm_trbe_remove_cpuhp(struct trbe_drvdata *drvdata) static int arm_trbe_probe_irq(struct platform_device *pdev, struct trbe_drvdata *drvdata) { + const struct arm_pmu_acpi_dev_data *acpi_data = + dev_get_platdata(&pdev->dev); const struct cpumask *affinity; int ret; @@ -1547,14 +1550,27 @@ static int arm_trbe_probe_irq(struct platform_device *pdev, return -EINVAL; } - cpumask_copy(&drvdata->supported_cpus, affinity); + /* + * The ACPI path has no fwnode describing which CPUs implement TRBE, + * so it passes the mask explicitly. DT devices still use the + * firmware-described IRQ affinity. + */ + cpumask_copy(&drvdata->supported_cpus, + acpi_data ? &acpi_data->cpus : affinity); + + /* + * supported_cpus gets pruned as CPUs are probed, so keep a stable + * copy for the IRQ action. + */ + cpumask_copy(&drvdata->irq_affinity, &drvdata->supported_cpus); drvdata->handle = alloc_percpu(struct perf_output_handle *); if (!drvdata->handle) return -ENOMEM; - ret = request_percpu_irq_affinity(drvdata->irq, arm_trbe_irq_handler, DRVNAME, - affinity, drvdata->handle); + ret = request_percpu_irq_affinity(drvdata->irq, arm_trbe_irq_handler, + DRVNAME, &drvdata->irq_affinity, + drvdata->handle); if (ret) { free_percpu(drvdata->handle); return ret; diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c index b70f3fedf028..712b7f187301 100644 --- a/drivers/perf/arm_spe_pmu.c +++ b/drivers/perf/arm_spe_pmu.c @@ -1330,6 +1330,8 @@ static void arm_spe_pmu_dev_teardown(struct arm_spe_pmu *spe_pmu) static int arm_spe_pmu_irq_probe(struct arm_spe_pmu *spe_pmu) { struct platform_device *pdev = spe_pmu->pdev; + const struct arm_pmu_acpi_dev_data *acpi_data = + dev_get_platdata(&pdev->dev); const struct cpumask *affinity; int irq; @@ -1342,7 +1344,13 @@ static int arm_spe_pmu_irq_probe(struct arm_spe_pmu *spe_pmu) return -EINVAL; } - cpumask_copy(&spe_pmu->supported_cpus, affinity); + /* + * The ACPI path has no fwnode describing which CPUs implement SPE, + * so it passes the mask explicitly. DT devices still use the + * firmware-described IRQ affinity. + */ + cpumask_copy(&spe_pmu->supported_cpus, + acpi_data ? &acpi_data->cpus : affinity); spe_pmu->irq = irq; return 0; diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 02d2c7f45b52..7f1c03c55025 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -8,6 +8,7 @@ #ifndef __ARM_PMU_H__ #define __ARM_PMU_H__ +#include #include #include #include @@ -199,6 +200,15 @@ void armpmu_free_irq(struct arm_pmu * __percpu *armpmu, int irq, int cpu); #define ARMV8_SPE_PDEV_NAME "arm,spe-v1" #define ARMV8_TRBE_PDEV_NAME "arm,trbe" +/* + * Per-device CPU mask passed by the ACPI MADT walk. The synthetic + * platform devices have no fwnode, so the IRQ affinity cannot describe + * which CPUs actually implement the feature. + */ +struct arm_pmu_acpi_dev_data { + struct cpumask cpus; +}; + /* Why does everything I do descend into this? */ #define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi) \ (lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi -- 2.55.0