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Mon, 02 Nov 2026 17:24:15 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 2 Nov 2026 17:24:14 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 2 Nov 2026 17:24:14 +0800 From: santino.wang To: Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , , Santino Wang Subject: [RFC PATCH 01/11] soc: mediatek: dram-ecc: add the DRAM ECC driver skeleton Date: Mon, 2 Nov 2026 17:23:23 +0800 Message-ID: <20261102092334.138759-2-santino.wang@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20261102092334.138759-1-santino.wang@mediatek.com> References: <20261102092334.138759-1-santino.wang@mediatek.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N From: Santino Wang On the MediaTek mt8992 SoC the secure firmware (ATF) owns the DRAM controller ECC interrupts and reports each corrected (CE) or uncorrectable (UCE) error to the OS as an ACPI GHES record. The following patches add the driver that consumes those records. Add only the module skeleton here: the Kconfig entry, the Makefiles, a class device that the later patches attach their sysfs attributes to, and the MAINTAINERS entry. Signed-off-by: Santino Wang --- MAINTAINERS | 9 ++++ drivers/soc/mediatek/Kconfig | 2 + drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/dram-ecc/Kconfig | 16 ++++++ drivers/soc/mediatek/dram-ecc/Makefile | 3 ++ drivers/soc/mediatek/dram-ecc/core/Makefile | 6 +++ drivers/soc/mediatek/dram-ecc/core/main.c | 53 +++++++++++++++++++ .../soc/mediatek/dram-ecc/core/mtk_dram_ecc.h | 24 +++++++++ 8 files changed, 114 insertions(+) create mode 100644 drivers/soc/mediatek/dram-ecc/Kconfig create mode 100644 drivers/soc/mediatek/dram-ecc/Makefile create mode 100644 drivers/soc/mediatek/dram-ecc/core/Makefile create mode 100644 drivers/soc/mediatek/dram-ecc/core/main.c create mode 100644 drivers/soc/mediatek/dram-ecc/core/mtk_dram_ecc.h diff --git a/MAINTAINERS b/MAINTAINERS index aaf2825ac945..e7d25be97f24 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17026,6 +17026,15 @@ S: Maintained F: Documentation/devicetree/bindings/dma/mediatek,* F: drivers/dma/mediatek/ +MEDIATEK DRAM ECC DRIVER +M: Santino Wang +L: linux-kernel@vger.kernel.org +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: drivers/soc/mediatek/dram-ecc/ +F: include/uapi/linux/mtk_dram_ecc_netlink.h + MEDIATEK ETHERNET DRIVER M: Felix Fietkau M: Lorenzo Bianconi diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig index d7293977f06e..91aed7d29be0 100644 --- a/drivers/soc/mediatek/Kconfig +++ b/drivers/soc/mediatek/Kconfig @@ -89,4 +89,6 @@ config MTK_SOCINFO information about the SoC to the userspace including the manufacturer name, marketing name and soc name. +source "drivers/soc/mediatek/dram-ecc/Kconfig" + endmenu diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile index 0665573e3c4b..880342bed606 100644 --- a/drivers/soc/mediatek/Makefile +++ b/drivers/soc/mediatek/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o obj-$(CONFIG_MTK_MMSYS) += mtk-mutex.o obj-$(CONFIG_MTK_SVS) += mtk-svs.o obj-$(CONFIG_MTK_SOCINFO) += mtk-socinfo.o +obj-y += dram-ecc/ diff --git a/drivers/soc/mediatek/dram-ecc/Kconfig b/drivers/soc/mediatek/dram-ecc/Kconfig new file mode 100644 index 000000000000..c015c66635b2 --- /dev/null +++ b/drivers/soc/mediatek/dram-ecc/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# MediaTek DRAM ECC error handling driver +# See plat/mediatek/drivers/dram_ecc/ in ATF for the SMC handler side. +# + +# core/ -> mtk_dram_ecc.ko +config MTK_DRAM_ECC + tristate "MediaTek DRAM ECC Error Handling Driver" + depends on HAVE_ARM_SMCCC && ACPI_APEI_GHES + default m + help + Driver for MediaTek DRAM ECC runtime error handling. It works + with the secure firmware (ATF), which owns the DRAM controller + ECC interrupts and reports each corrected or uncorrectable + error to the OS as an ACPI GHES record. diff --git a/drivers/soc/mediatek/dram-ecc/Makefile b/drivers/soc/mediatek/dram-ecc/Makefile new file mode 100644 index 000000000000..977922150133 --- /dev/null +++ b/drivers/soc/mediatek/dram-ecc/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-$(CONFIG_MTK_DRAM_ECC) += core/ diff --git a/drivers/soc/mediatek/dram-ecc/core/Makefile b/drivers/soc/mediatek/dram-ecc/core/Makefile new file mode 100644 index 000000000000..77751c836027 --- /dev/null +++ b/drivers/soc/mediatek/dram-ecc/core/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-$(CONFIG_MTK_DRAM_ECC) += mtk_dram_ecc.o + +mtk_dram_ecc-y := \ + main.o diff --git a/drivers/soc/mediatek/dram-ecc/core/main.c b/drivers/soc/mediatek/dram-ecc/core/main.c new file mode 100644 index 000000000000..5000d1f3c7e3 --- /dev/null +++ b/drivers/soc/mediatek/dram-ecc/core/main.c @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2026 MediaTek Inc. + */ +#include +#include +#include + +#include "mtk_dram_ecc.h" + +static struct class *mtk_dram_ecc_class; +static struct device *mtk_dram_ecc_dev; + +struct mtk_dram_ecc_data mtk_ecc_data = { + .lb_threshold = MTK_ECC_LB_THRESHOLD_DEFAULT, + .lb_decay_interval_sec = MTK_ECC_LB_DECAY_INTERVAL_DEFAULT, + .lb_max_tracked = MTK_ECC_LB_MAX_TRACKED_DEFAULT, +}; + +static int __init mtk_dram_ecc_init(void) +{ + int ret; + + mtk_dram_ecc_class = class_create("mtk-dram-ecc"); + if (IS_ERR(mtk_dram_ecc_class)) + return PTR_ERR(mtk_dram_ecc_class); + + mtk_dram_ecc_dev = device_create(mtk_dram_ecc_class, NULL, + MKDEV(0, 0), &mtk_ecc_data, + "mtk-dram-ecc0"); + if (IS_ERR(mtk_dram_ecc_dev)) { + ret = PTR_ERR(mtk_dram_ecc_dev); + goto err_class; + } + + dev_info(mtk_dram_ecc_dev, "initialized\n"); + return 0; + +err_class: + class_destroy(mtk_dram_ecc_class); + return ret; +} + +static void __exit mtk_dram_ecc_exit(void) +{ + device_destroy(mtk_dram_ecc_class, MKDEV(0, 0)); + class_destroy(mtk_dram_ecc_class); +} + +module_init(mtk_dram_ecc_init); +module_exit(mtk_dram_ecc_exit); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("MediaTek DRAM ECC Error Handling Driver"); diff --git a/drivers/soc/mediatek/dram-ecc/core/mtk_dram_ecc.h b/drivers/soc/mediatek/dram-ecc/core/mtk_dram_ecc.h new file mode 100644 index 000000000000..456961818ccd --- /dev/null +++ b/drivers/soc/mediatek/dram-ecc/core/mtk_dram_ecc.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2026 MediaTek Inc. + */ +#ifndef _MTK_DRAM_ECC_H_ +#define _MTK_DRAM_ECC_H_ + +#include +#include + +struct mtk_dram_ecc_data { + /* [leaky_bucket] */ + u32 lb_threshold; + u32 lb_decay_interval_sec; + u32 lb_max_tracked; + +#define MTK_ECC_LB_THRESHOLD_DEFAULT 100 +#define MTK_ECC_LB_DECAY_INTERVAL_DEFAULT 3600 +#define MTK_ECC_LB_MAX_TRACKED_DEFAULT 16 +}; + +extern struct mtk_dram_ecc_data mtk_ecc_data; + +#endif /* _MTK_DRAM_ECC_H_ */ -- 2.45.2