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Mon, 2 Nov 2026 03:15:12 -0800 From: Manikanta Maddireddy To: , , , , , CC: , , , , , , , Subject: [PATCH v3 2/4] PCI: tegra194: Avoid full Endpoint reinit on PERST# Date: Mon, 2 Nov 2026 16:44:48 +0530 Message-ID: <20261102111450.4010818-3-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261102111450.4010818-1-mmaddireddy@nvidia.com> References: <20261102111450.4010818-1-mmaddireddy@nvidia.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00018072:EE_|DM4PR12MB5819:EE_ X-MS-Office365-Filtering-Correlation-Id: 4ff936ef-999e-438a-a061-08df38d29d1c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|30052699003|23010399003|376014|7416014|1800799024|82310400026|36860700016|261021123027099003|261021121427099003|11063799006|56012099006|261009223027099003|261028144727099003|261026121527099003|261026140227099003|261022105027099003|261022075727099003|10067099003|22082099003|18002099003|6133799003; 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The common DWC initialization path now restores those registers while preserving its software resources. Tegra therefore no longer needs to call dw_pcie_ep_cleanup() on each PERST# cycle. Remove the per-reset dw_pcie_ep_cleanup() call. The existing dw_pcie_ep_init_registers() entry point now restores reset-lost registers after the first initialization while retaining software resources until final driver teardown. The allocation guards already reuse the bitmaps, address array and per-function descriptors; this change also avoids repeating the full debugfs/eDMA teardown and setup. Keep the EPF deinit notification in the PERST# deassert path after REFCLK is available and core reset has been deasserted, because EPF deinit callbacks can clear BARs and need register access. The final dw_pcie_ep_deinit() during driver removal still performs full cleanup. Signed-off-by: Manikanta Maddireddy --- Changes V2 -> V3: - No code changes from v2; rebased onto the current PCI main-based stack. Changes V1 -> V2: - Keep the existing dw_pcie_ep_init_registers() call now that it handles both initial setup and reset recovery; only remove per-reset cleanup. - Clarify the retained resource lifetimes and shorten the opening paragraph to focus on the Tegra change. drivers/pci/controller/dwc/pcie-tegra194.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 72158fc5c639..08d6f4c5220f 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1909,7 +1909,6 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) /* Perform cleanup that requires refclk and core reset deasserted */ pci_epc_deinit_notify(pcie->pci.ep.epc); - dw_pcie_ep_cleanup(&pcie->pci.ep); val = dw_pcie_readl_dbi(pci, LINK_WIDTH_SPEED_CTRL); val &= ~SPEED_CHANGE; -- 2.34.1