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Mon, 2 Nov 2026 03:32:43 -0800 From: Johnny Liu To: Mikko Perttunen CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , "Prashant Gaikwad" , Stephen Boyd , Brian Masney , Jerome Brunet , "Douglas Anderson" , Aniruddha Rao , , , , , Johnny Liu Subject: Re: [PATCH v2 2/4] firmware: tegra: bpmp: Add Tegra238 support Date: Mon, 2 Nov 2026 11:32:08 +0000 Message-ID: <20261102113224.2404743-1-johnliu@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <2Hw2_7rkSLKRLbLEfioCFA@nvidia.com> References: X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV8PEPF0000006C:EE_|SA0PR12MB4480:EE_ X-MS-Office365-Filtering-Correlation-Id: 71fc960d-4238-47b5-f0fc-08df38d50c6b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|23010399003|36860700016|82310400026|11063799006|56012099006|261009223027099003|261021123027099003|261021121427099003|261022075727099003|10067099003|18002099003|22082099003|6133799003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Ksfe3GfFNALqKsqYP1wEIkQAoOKbw9aow2rEa+xOP5bP+fsR+qpE4ZWfIXYaT1CSTW+dt+lXBQrkGqsEC4Y6DSCHSYDukkXTMlslsJ3HXloQ3yukDYxQZcHsFaxxZcBUPfnVT8e1IS5VLhqYms3cWQF7rbBu3wY1vDaSYcy62rWUTh6HZofv0ASLI3hi9Z9nFrUIrikHAxfcP4KZsZh0aMoszg6TZ5g9tBG2llvpDhIjx137+eDWSe0dc/BjppNCmyIs+I8sMvPiMqj5JjGBjxZmsCLHm4D+42ySYhgqelWSYDFxb66nv0jwfMy6RdA7uhHL3EtioWahIu9FymBqb0CLz6TJE7+mA6+nSDOPCDjspY80gzYNfsfl3VbQJR2zvbhC5Sqh9j6lxWR0uVkg0U96qcEx7z3Ei78NvRbRTKbqwaPVe7LtJTn7LKjLA8Xu X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Nov 2026 11:32:59.5804 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 71fc960d-4238-47b5-f0fc-08df38d50c6b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: LV8PEPF0000006C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4480 On 2026/11/02 08:48, Mikko Perttunen wrote: > On Thursday, October 29, 2026 12:49 AM Johnny Liu wrote: > > The "nvidia,tegra186-bpmp" compatible and tegra186_soc data are shared by > > Tegra186, Tegra194, Tegra234 and Tegra264. Tegra238 has its own BPMP > > compatible, so give Tegra234, Tegra238 and Tegra264 dedicated SoC data > > selected through their specific compatibles, built on top of a common > > TEGRA186_BPMP_SOC_COMMON initializer. This allows chip specific > > properties to be described in the SoC data. Tegra186 and Tegra194 keep > > using tegra186_soc. > > > > Also build bpmp-tegra186.o and the shared match table for > > CONFIG_ARCH_TEGRA_238_SOC, so that a Tegra238-only configuration binds > > the driver. > > > > Signed-off-by: Johnny Liu > > --- > > drivers/firmware/tegra/Makefile | 1 + > > drivers/firmware/tegra/bpmp.c | 54 ++++++++++++++++++++++----------- > > 2 files changed, 38 insertions(+), 17 deletions(-) > > This refactoring in this patch makes no sense unless you first read the > next patch, plus it has the unrelated factor of adding Tegra238 support, > which makes it quite confusing. Yes, I agree with you. This patch makes sense only after reading the next patch in the patch series. > Can you move the TEGRA186_BPMP_SOC_COMMON refactoring into the 'per-SoC > EMC clock ID' patch, and have the Tegra238 addition as a separate patch > before or after it? Ack, I will move this refactor in the 'per-SoC EMC clock ID' patch. [...] Best Regards, Johnny Liu > > diff --git a/drivers/firmware/tegra/Makefile b/drivers/firmware/tegra/Makefile > > index 97f7a5db9d0a..21e87f3afffe 100644 > > --- a/drivers/firmware/tegra/Makefile > > +++ b/drivers/firmware/tegra/Makefile > > @@ -4,6 +4,7 @@ tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC) += bpmp-tegra210.o > > tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC) += bpmp-tegra186.o > > tegra-bpmp-$(CONFIG_ARCH_TEGRA_194_SOC) += bpmp-tegra186.o > > tegra-bpmp-$(CONFIG_ARCH_TEGRA_234_SOC) += bpmp-tegra186.o > > +tegra-bpmp-$(CONFIG_ARCH_TEGRA_238_SOC) += bpmp-tegra186.o > > tegra-bpmp-$(CONFIG_ARCH_TEGRA_264_SOC) += bpmp-tegra186.o > > tegra-bpmp-$(CONFIG_DEBUG_FS) += bpmp-debugfs.o > > tegra-bpmp-$(CONFIG_SYSFS) += bpmp-sysfs.o > > diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c > > index d3508e98e338..beeb385870f5 100644 > > --- a/drivers/firmware/tegra/bpmp.c > > +++ b/drivers/firmware/tegra/bpmp.c > > @@ -1131,25 +1131,41 @@ static const struct dev_pm_ops tegra_bpmp_pm_ops = { > > #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ > > IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ > > IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) || \ > > + IS_ENABLED(CONFIG_ARCH_TEGRA_238_SOC) || \ > > IS_ENABLED(CONFIG_ARCH_TEGRA_264_SOC) > > +#define TEGRA186_BPMP_SOC_COMMON \ > > + .channels = { \ > > + .cpu_tx = { \ > > + .offset = 3, \ > > + .timeout = 60 * USEC_PER_SEC, \ > > + }, \ > > + .thread = { \ > > + .offset = 0, \ > > + .count = 3, \ > > + .timeout = 600 * USEC_PER_SEC, \ > > + }, \ > > + .cpu_rx = { \ > > + .offset = 13, \ > > + .timeout = 0, \ > > + }, \ > > + }, \ > > + .ops = &tegra186_bpmp_ops, \ > > + .num_resets = 193 > > + > > static const struct tegra_bpmp_soc tegra186_soc = { > > - .channels = { > > - .cpu_tx = { > > - .offset = 3, > > - .timeout = 60 * USEC_PER_SEC, > > - }, > > - .thread = { > > - .offset = 0, > > - .count = 3, > > - .timeout = 600 * USEC_PER_SEC, > > - }, > > - .cpu_rx = { > > - .offset = 13, > > - .timeout = 0, > > - }, > > - }, > > - .ops = &tegra186_bpmp_ops, > > - .num_resets = 193, > > + TEGRA186_BPMP_SOC_COMMON, > > +}; > > + > > +static const struct tegra_bpmp_soc tegra234_soc = { > > + TEGRA186_BPMP_SOC_COMMON, > > +}; > > + > > +static const struct tegra_bpmp_soc tegra238_soc = { > > + TEGRA186_BPMP_SOC_COMMON, > > +}; > > + > > +static const struct tegra_bpmp_soc tegra264_soc = { > > + TEGRA186_BPMP_SOC_COMMON, > > }; > > #endif > > > > @@ -1180,8 +1196,12 @@ static const struct of_device_id tegra_bpmp_match[] = { > > #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ > > IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ > > IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) || \ > > + IS_ENABLED(CONFIG_ARCH_TEGRA_238_SOC) || \ > > IS_ENABLED(CONFIG_ARCH_TEGRA_264_SOC) > > { .compatible = "nvidia,tegra186-bpmp", .data = &tegra186_soc }, > > + { .compatible = "nvidia,tegra234-bpmp", .data = &tegra234_soc }, > > + { .compatible = "nvidia,tegra238-bpmp", .data = &tegra238_soc }, > > + { .compatible = "nvidia,tegra264-bpmp", .data = &tegra264_soc }, > > #endif > > #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) > > { .compatible = "nvidia,tegra210-bpmp", .data = &tegra210_soc }, > > -- > > 2.43.0 > > > > > > > >