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Mon, 02 Nov 2026 06:23:12 -0800 (PST) Received: from localhost ([2.27.148.106]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2eb392486d5sm29700245ad.29.2026.11.02.06.23.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 06:23:10 -0800 (PST) From: Han Gao To: Conor Dooley Cc: Han Gao , gaohan@iscas.ac.cn, Drew Fustini , Paul Walmsley , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, Rob Herring , Jerome Brunet , Alexandre Ghiti , Anup Patel , Radu Rendec , Zhiguo Zhu , devicetree@vger.kernel.org, Conor Dooley , Albert Ou , Bartosz Golaszewski , linux-gpio@vger.kernel.org, Daniel Lezcano , Brian Masney , Krzysztof Kozlowski , Stephen Boyd , Linus Walleij , linux-kernel@vger.kernel.org, Samuel Holland , Palmer Dabbelt , Thomas Gleixner , Philipp Zabel , Paul Walmsley Subject: Re: [PATCH 17/18] riscv: defconfig: enable A210 support Date: Mon, 2 Nov 2026 22:22:53 +0800 Message-ID: <20261102142300.3784622-1-rabenda.cn@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261022-concrete-rebound-593001f1ac18@spud> References: X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On Thu, 22 Oct 2026 19:50:51 +0100 Conor Dooley wrote: > On Thu, Oct 22, 2026 at 03:53:37AM +0800, Han Gao via B4 Relay wrote: > > From: Han Gao > > > > Enable A210 platform drivers and reserve ten 8250 UART ports. > > > > Signed-off-by: Han Gao > > --- > > arch/riscv/configs/defconfig | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > > index 04ae305d5511..b9b3bca12089 100644 > > --- a/arch/riscv/configs/defconfig > > +++ b/arch/riscv/configs/defconfig > > @@ -33,6 +33,7 @@ CONFIG_SOC_STARFIVE=y > > CONFIG_ARCH_SUNXI=y > > CONFIG_ARCH_TENSTORRENT=y > > CONFIG_ARCH_THEAD=y > > +CONFIG_ARCH_ZHIHE=y > > CONFIG_ARCH_ULTRARISC=y > > CONFIG_ARCH_VIRT=y > > CONFIG_ARCH_CANAAN=y > > @@ -149,6 +150,8 @@ CONFIG_KEYBOARD_GPIO=y > > CONFIG_KEYBOARD_SUN4I_LRADC=m > > CONFIG_SERIAL_8250=y > > CONFIG_SERIAL_8250_CONSOLE=y > > +CONFIG_SERIAL_8250_NR_UARTS=10 > > +CONFIG_SERIAL_8250_RUNTIME_UARTS=10 > > Why are these options needed? The A210 has 10 UARTs and the TH1520 has 6. With the default of 4, UARTs beyond the 4th don't get a fixed ttyS index and end up in whatever slot is free. Raising both to 10 keeps the index stable. > > > CONFIG_SERIAL_8250_DW=y > > CONFIG_SERIAL_OF_PLATFORM=y > > CONFIG_SERIAL_EARLYCON_RISCV_SBI=y > > @@ -167,6 +170,7 @@ CONFIG_SPI_PL022=m > > CONFIG_SPI_SIFIVE=y > > CONFIG_SPI_SUN6I=y > > # CONFIG_PTP_1588_CLOCK is not set > > +CONFIG_PINCTRL_A210=y > > CONFIG_PINCTRL_TH1520=y > > CONFIG_PINCTRL_SOPHGO_CV1800B=y > > CONFIG_PINCTRL_SOPHGO_CV1812H=y > > > > -- > > 2.55.0 > > > > > Sent using hkml (https://github.com/sjp38/hackermail)