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([218.239.109.48]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a428af1easm33875716eec.5.2026.11.02.09.33.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 09:33:20 -0800 (PST) From: =?UTF-8?q?GIBEOM=20LEE=20=28=EC=9D=B4=EA=B8=B0=EB=B2=94=29?= To: Alexandre Mergnat Cc: Mark Brown , Liam Girdwood , AngeloGioacchino Del Regno , Matthias Brugger , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH 0/2] regulator: mt6363: Fix the regmap value width and the VSRAM LDO registers Date: Tue, 3 Nov 2026 02:33:03 +0900 Message-ID: <20261102173303.3464879-1-rtx4060@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261102164345.523122-1-amergnat@baylibre.com> References: <20261102164345.523122-1-amergnat@baylibre.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Alexandre, On Mon, Nov 02, 2026 at 04:43:45PM +0000, Alexandre Mergnat wrote: > It fixes the range lookup of the getter and selects the trap 0 or trap 1 > registers at probe. Could you check it against the VEMC failures of your > model? If it covers them, it may save you some work on your own fix. I > have nothing for the overcurrent handling, so that part is all yours. It covers them, thanks. Six of the nine failures in my cover letter were about VEMC. As the model stood, three VEMC checks still failed on your series, only because they change TOP_TRAP after probe. I changed the model to probe once per trap value and to take the trap 1 trim from 0x1b1c, and then: - With VOSEL 6 and VOCAL 5, the unpatched driver reads 1.25 V, as you saw on hardware, and your series reads 2.55 V. - With trap 0 and with trap 1, all 176 VEMC selectors read back as they were set. Only the fields of that trap and the TMA key change, and the key is closed afterwards. - Trap 2 fails the probe, as your changelog says. - ASan reports nothing. With GCC 14 on arm64, each patch builds with W=1 on v7.2.12, where this file is the same as in for-next. This is a model, so it is not a Tested-by. It takes 0x1b1c from your patch, so it says nothing about that address. The MediaTek header and driver I have don't define it. My own VEMC fix guessed bits [7:4] of 0x1b1b for that field, so I will drop it. I will post the overcurrent fixes once I have tested them on my board. Thanks also for testing 2/2 on hardware. That shows more than my model could. Mark, please take Alexandre's regmap patch instead of my 1/2. It is the same change, it gets the BUCK_TOP key order right, and Alexandre can run this driver and has the datasheet. My board is still locked and I have no datasheet. My 2/2 is not covered by Alexandre's series and is still needed, and it now has Alexandre's Tested-by. It does not depend on either regmap patch. It applies to regulator for-next on its own or on top of that series, and both orders give the same file. I can resend it alone if that is easier. Claude, the AI assistant from my cover letter, ran these checks and drafted this mail. I read both before sending.