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[86.148.231.190]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48fcd03d028sm309364f8f.47.2026.11.03.11.50.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2026 11:50:35 -0800 (PST) From: Areeb Ul Haq Mirza To: Linus Walleij Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Areeb Ul Haq Mirza Subject: [PATCH] pinctrl: keembay: make keembay_gpio_irqchip const Date: Mon, 2 Nov 2026 21:25:00 +0000 Message-ID: <20261102212500.195783-1-auhmirza02@gmail.com> X-Mailer: git-send-email 2.53.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit gpiolib warns about mutable irq_chips at probe time: "not an immutable chip, please consider fixing it!" Make keembay_gpio_irqchip const, flag it as IRQCHIP_IMMUTABLE, add the GPIOCHIP_IRQ_RESOURCE_HELPERS and register it with gpio_irq_chip_set_chip(). The chip only implements .irq_enable() and .irq_disable(), so call gpiochip_enable_irq() and gpiochip_disable_irq() from those callbacks, following commit 35d008679a5a ("pinctrl: plgpio: Convert to immutable irq_chip") [1] and commit 2993d2dd8ff4 ("gpio: timberdale: Make irq_chip immutable") [2]. gpiochip_enable_irq() is called once a free interrupt source and slot have been found, so a line is only marked enabled when it is actually routed. gpiochip_disable_irq() is called after the line has been cleared from the interrupt configuration register. Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-3-6b59a5186b00@linaro.org [1] Link: https://lore.kernel.org/r/20250509-gpio-v1-8-639377c98288@nxp.com [2] Signed-off-by: Areeb Ul Haq Mirza --- Compile-tested only (arm64, W=1, sparse). drivers/pinctrl/pinctrl-keembay.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-keembay.c b/drivers/pinctrl/pinctrl-keembay.c index 3241d3ae6219..486577458883 100644 --- a/drivers/pinctrl/pinctrl-keembay.c +++ b/drivers/pinctrl/pinctrl-keembay.c @@ -1380,6 +1380,8 @@ static void keembay_gpio_irq_enable(struct irq_data *data) if (src < 0 || slot < 0) return; + gpiochip_enable_irq(gc, pin); + if (trig & KEEMBAY_GPIO_SENSE_LOW) keembay_gpio_invert(kpc, pin); @@ -1412,6 +1414,7 @@ static void keembay_gpio_irq_disable(struct irq_data *data) for_each_set_clump8(pos, clump, ®, BITS_PER_TYPE(typeof(reg))) { if ((clump & ~KEEMBAY_GPIO_IRQ_ENABLE) == pin) { keembay_gpio_clear_irq(data, pos, src, pin); + gpiochip_disable_irq(gc, pin); return; } } @@ -1451,12 +1454,14 @@ static int keembay_gpio_add_pin_ranges(struct gpio_chip *chip) return ret; } -static struct irq_chip keembay_gpio_irqchip = { +static const struct irq_chip keembay_gpio_irqchip = { .name = "keembay-gpio", .irq_enable = keembay_gpio_irq_enable, .irq_disable = keembay_gpio_irq_disable, .irq_set_type = keembay_gpio_irq_set_type, .irq_ack = keembay_gpio_irq_ack, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; static int keembay_gpiochip_probe(struct keembay_pinctrl *kpc, @@ -1468,7 +1473,7 @@ static int keembay_gpiochip_probe(struct keembay_pinctrl *kpc, /* Setup GPIO IRQ chip */ girq = &kpc->chip.irq; - girq->chip = &keembay_gpio_irqchip; + gpio_irq_chip_set_chip(girq, &keembay_gpio_irqchip); girq->parent_handler = keembay_gpio_irq_handler; girq->num_parents = KEEMBAY_GPIO_NUM_IRQ; girq->parents = devm_kcalloc(kpc->dev, girq->num_parents, base-commit: f33a24cc012d34f25bb9942681bd478a1757b806 -- 2.53.0