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Mon, 02 Nov 2026 13:51:26 -0800 (PST) Received: from DESKTOP-NM9EKIA ([125.134.240.130]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a42935b4asm54710712eec.16.2026.11.02.13.51.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 13:51:25 -0800 (PST) From: Joonhoe Kim <26rote@gmail.com> To: gregkh@linuxfoundation.org, Thinh.Nguyen@synopsys.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org Cc: abelvesa@kernel.org, wesley.cheng@oss.qualcomm.com, krishna.kurapati@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com, neil.armstrong@linaro.org, val@packett.cool, balaji.kalkonda@oss.qualcomm.com, tvlad744@gmail.com, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: usb: qcom,snps-dwc3: Add mode-switch Date: Tue, 3 Nov 2026 06:51:18 +0900 Message-ID: <20261102215121.738-2-26rote@gmail.com> X-Mailer: git-send-email 2.55.0.windows.5 In-Reply-To: <20261102215121.738-1-26rote@gmail.com> References: <20261102215121.738-1-26rote@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The QMP USB3-DP combo PHY stops the USB3 PIPE clock when a Type-C DisplayPort pin assignment gives it all four lanes for DisplayPort, while the controller can keep running its USB 2.0 port. The controller has to move to the UTMI clock before that happens, so it needs the Type-C mux state as well. fwnode_typec_mux_get() only matches graph nodes that have the "mode-switch" property, so allow it on the controller node. Signed-off-by: Joonhoe Kim <26rote@gmail.com> --- Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml index b77c02c64d45..1380b769c73c 100644 --- a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml @@ -158,6 +158,13 @@ properties: HS/FS/LS modes are supported. type: boolean + mode-switch: + description: + Flag the controller as a USB Type-C mode switch, so it is notified + of altmode changes. In pin assignments that give all SuperSpeed + lanes to DisplayPort the USB3 PHY stops its PIPE clock. + type: boolean + wakeup-source: true required: -- 2.43.0