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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Minda Chen <minda.chen@starfivetech.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	 Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor@kernel.org>,
	linux-usb@vger.kernel.org,  linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: usb: starfive,jhb100-dwc3: Add clock number limit
Date: Tue, 3 Nov 2026 12:50:26 +0100	[thread overview]
Message-ID: <20261103-aspiring-spotted-loris-fab3df@quoll> (raw)
In-Reply-To: <20261103064836.71059-3-minda.chen@starfivetech.com>

On Tue, Nov 03, 2026 at 02:48:35PM +0800, Minda Chen wrote:
> StarFive JHB100 device controller do not connect with PHY
> but connect with digital adapter module. So it do not

Please use any grammar check tool.

> contain core reference clock. So the minimal clock number is 2
> (glue layer main enable clock and dwc3 core bus clk). So Add
> minItem 2 to clock and clock-names items.

So the binding is completely wrong? I see no logic in this explanation.
You claim device DOES NOT connect with a phy, which would imply some
removal, but you did not remove anything but made it optional. So it
does connect with a phy?

Impossible to parse/understand.

Best regards,
Krzysztof


  reply	other threads:[~2026-11-03 11:50 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03  6:48 [PATCH v2 0/3] Add StarFive JHB100 host field USB device controller driver Minda Chen
2026-11-03  6:48 ` [PATCH v2 1/3] dt-bindings: usb: starfive,jhb100-dwc3: Add adapter register region Minda Chen
2026-11-03 11:48   ` Krzysztof Kozlowski
2026-11-03  6:48 ` [PATCH v2 2/3] dt-bindings: usb: starfive,jhb100-dwc3: Add clock number limit Minda Chen
2026-11-03 11:50   ` Krzysztof Kozlowski [this message]
2026-11-03  6:48 ` [PATCH v2 3/3] usb: dwc3: starfive: Add JHB100 USB device adapter port enable quirk Minda Chen

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