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The r000 load-and-execute bootloader event carries such a descriptor, so its handler will need the descriptor type. The descriptor was defined in the FWSEC code, which was its only user. Move the definition, unchanged, into the generic bootloader module. No functional changes. Assisted-by: LLM Signed-off-by: John Hubbard [acourbot: keep the fields private, add a constructor and the ctx_dma() accessor instead of making every field pub(crate)] Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/firmware/fwsec/bootloader.rs | 95 +++++----------------- drivers/gpu/nova-core/firmware/gen_bootloader.rs | 94 ++++++++++++++++++++- 2 files changed, 112 insertions(+), 77 deletions(-) diff --git a/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs b/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs index 3943948d74bc..ad798ec5645a 100644 --- a/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs +++ b/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs @@ -35,60 +35,16 @@ }, firmware::{ fwsec::FwsecFirmware, - gen_bootloader::GenericBootloader, // + gen_bootloader::{ + BootloaderDmemDescV2, + GenericBootloader, // + }, }, gpu::Chipset, num::FromSafeCast, // regs, }; -/// Structure used by the boot-loader to load the rest of the code. -/// -/// This has to be filled by the GPU driver and copied into DMEM at offset -/// [`BootloaderDesc.dmem_load_off`]. -#[repr(C, packed)] -#[derive(Debug, Clone)] -struct BootloaderDmemDescV2 { - /// Reserved, should always be first element. - reserved: [u32; 4], - /// 16B signature for secure code, 0s if no secure code. - signature: [u32; 4], - /// DMA context used by the bootloader while loading code/data. - ctx_dma: u32, - /// 256B-aligned physical FB address where code is located. - code_dma_base: u64, - /// Offset from `code_dma_base` where the non-secure code is located. - /// - /// Also used as destination IMEM offset of non-secure code as the DMA firmware object is - /// expected to be a mirror image of its loaded state. - /// - /// Must be multiple of 256. - non_sec_code_off: u32, - /// Size of the non-secure code part. - non_sec_code_size: u32, - /// Offset from `code_dma_base` where the secure code is located (must be multiple of 256). - /// - /// Also used as destination IMEM offset of secure code as the DMA firmware object is expected - /// to be a mirror image of its loaded state. - /// - /// Must be multiple of 256. - sec_code_off: u32, - /// Size of the secure code part. - sec_code_size: u32, - /// Code entry point invoked by the bootloader after code is loaded. - code_entry_point: u32, - /// 256B-aligned physical FB address where data is located. - data_dma_base: u64, - /// Size of data block (should be multiple of 256B). - data_size: u32, - /// Number of arguments to be passed to the target firmware being loaded. - argc: u32, - /// Arguments to be passed to the target firmware being loaded. - argv: u32, -} -// SAFETY: This struct doesn't contain uninitialized bytes and doesn't have interior mutability. -unsafe impl AsBytes for BootloaderDmemDescV2 {} - /// Wrapper for [`FwsecFirmware`] that includes the bootloader performing the actual load /// operation. pub(crate) struct FwsecFirmwareWithBl<'a> { @@ -140,9 +96,6 @@ pub(crate) fn new( }; let dmem_desc = { - // Bootloader payload is in non-coherent system memory. - const FALCON_DMAIDX_PHYS_SYS_NCOH: u32 = 4; - let imem_sec = firmware.imem_sec_load_params(); let imem_ns = firmware.imem_ns_load_params().ok_or(EINVAL)?; let dmem = firmware.dmem_load_params(); @@ -154,30 +107,20 @@ pub(crate) fn new( return Err(EINVAL); } - BootloaderDmemDescV2 { - reserved: [0; 4], - signature: [0; 4], - ctx_dma: FALCON_DMAIDX_PHYS_SYS_NCOH, - code_dma_base: firmware_dma.dma_address(), - // `dst_start` is also valid as the source offset since the firmware DMA object is - // a mirror image of the target IMEM layout. - non_sec_code_off: imem_ns.dst_start, - non_sec_code_size: imem_ns.len, - // `dst_start` is also valid as the source offset since the firmware DMA object is - // a mirror image of the target IMEM layout. - sec_code_off: imem_sec.dst_start, - sec_code_size: imem_sec.len, - code_entry_point: 0, - // Start of data section is the added padding + the DMEM `src_start` field. - data_dma_base: firmware_dma - .dma_address() - .checked_add(u64::from_safe_cast(align_padding)) - .and_then(|offset| offset.checked_add(dmem.src_start.into())) - .ok_or(EOVERFLOW)?, - data_size: dmem.len, - argc: 0, - argv: 0, - } + // Start of data section is the added padding + the DMEM `src_start` field. + let data_dma_base = firmware_dma + .dma_address() + .checked_add(u64::from_safe_cast(align_padding)) + .and_then(|offset| offset.checked_add(dmem.src_start.into())) + .ok_or(EOVERFLOW)?; + + BootloaderDmemDescV2::new( + &imem_ns, + &imem_sec, + &dmem, + firmware_dma.dma_address(), + data_dma_base, + ) }; Ok(Self { @@ -203,7 +146,7 @@ pub(crate) fn run(&self, dev: &Device, falcon: &Falcon<'_, Gsp>) // Configure DMA index for the bootloader to fetch the FWSEC firmware from system memory. falcon.pfalcon.update( - regs::NV_PFALCON_FBIF_TRANSCFG::try_at(usize::from_safe_cast(self.dmem_desc.ctx_dma)) + regs::NV_PFALCON_FBIF_TRANSCFG::try_at(usize::from_safe_cast(self.dmem_desc.ctx_dma())) .ok_or(EINVAL)?, |v| { v.with_target(FalconFbifTarget::CoherentSysmem) diff --git a/drivers/gpu/nova-core/firmware/gen_bootloader.rs b/drivers/gpu/nova-core/firmware/gen_bootloader.rs index d51948c6a2b8..a3de545731f5 100644 --- a/drivers/gpu/nova-core/firmware/gen_bootloader.rs +++ b/drivers/gpu/nova-core/firmware/gen_bootloader.rs @@ -8,7 +8,8 @@ use kernel::{ device, prelude::*, - ptr::Alignable, // + ptr::Alignable, + transmute::AsBytes, // }; use crate::{ @@ -16,6 +17,7 @@ self, gsp::Gsp, Falcon, + FalconDmaLoadTarget, FalconPioImemLoadTarget, // }, firmware::tlv::{ @@ -26,6 +28,96 @@ num::FromSafeCast, // }; +/// Structure used by the boot-loader to load the rest of the code. +/// +/// This has to be filled by the GPU driver and copied into DMEM at offset +/// [`BootloaderDesc.dmem_load_off`]. +#[repr(C, packed)] +#[derive(Debug, Clone)] +pub(crate) struct BootloaderDmemDescV2 { + /// Reserved, should always be first element. + reserved: [u32; 4], + /// 16B signature for secure code, 0s if no secure code. + signature: [u32; 4], + /// DMA context used by the bootloader while loading code/data. + ctx_dma: u32, + /// 256B-aligned physical FB address where code is located. + code_dma_base: u64, + /// Offset from `code_dma_base` where the non-secure code is located. + /// + /// Also used as destination IMEM offset of non-secure code as the DMA firmware object is + /// expected to be a mirror image of its loaded state. + /// + /// Must be multiple of 256. + non_sec_code_off: u32, + /// Size of the non-secure code part. + non_sec_code_size: u32, + /// Offset from `code_dma_base` where the secure code is located (must be multiple of 256). + /// + /// Also used as destination IMEM offset of secure code as the DMA firmware object is expected + /// to be a mirror image of its loaded state. + /// + /// Must be multiple of 256. + sec_code_off: u32, + /// Size of the secure code part. + sec_code_size: u32, + /// Code entry point invoked by the bootloader after code is loaded. + code_entry_point: u32, + /// 256B-aligned physical FB address where data is located. + data_dma_base: u64, + /// Size of data block (should be multiple of 256B). + data_size: u32, + /// Number of arguments to be passed to the target firmware being loaded. + argc: u32, + /// Arguments to be passed to the target firmware being loaded. + argv: u32, +} + +impl BootloaderDmemDescV2 { + /// Context DMA slot through which the bootloader reads the image: physical, non-coherent + /// system memory. + const FALCON_DMAIDX_PHYS_SYS_NCOH: u32 = 4; + + /// Creates the descriptor of an image whose code is at `code_dma_base` and whose data is at + /// `data_dma_base`. + /// + /// `imem_ns` and `imem_sec` locate the non-secure and secure code in the image, and `dmem` + /// gives the size of its data. The code DMA object must be a mirror image of the target IMEM + /// layout, because the bootloader uses the destination offset of each code segment as its + /// source offset too. + pub(crate) fn new( + imem_ns: &FalconDmaLoadTarget, + imem_sec: &FalconDmaLoadTarget, + dmem: &FalconDmaLoadTarget, + code_dma_base: u64, + data_dma_base: u64, + ) -> Self { + Self { + reserved: [0; 4], + signature: [0; 4], + ctx_dma: Self::FALCON_DMAIDX_PHYS_SYS_NCOH, + code_dma_base, + non_sec_code_off: imem_ns.dst_start, + non_sec_code_size: imem_ns.len, + sec_code_off: imem_sec.dst_start, + sec_code_size: imem_sec.len, + code_entry_point: 0, + data_dma_base, + data_size: dmem.len, + argc: 0, + argv: 0, + } + } + + /// Returns the context DMA slot through which the bootloader reads the image. + pub(crate) fn ctx_dma(&self) -> u32 { + self.ctx_dma + } +} + +// SAFETY: This struct doesn't contain uninitialized bytes and doesn't have interior mutability. +unsafe impl AsBytes for BootloaderDmemDescV2 {} + /// The generic falcon bootloader image and its IMEM load parameters. pub(crate) struct GenericBootloader { /// Bootloader code, zero-padded to a whole number of falcon memory blocks. -- 2.56.0