From: Val Packett <val@packett.cool>
To: Rob Clark <robin.clark@oss.qualcomm.com>,
Sean Paul <sean@poorly.run>,
Konrad Dybcio <konradybcio@kernel.org>,
Akhil P Oommen <akhilpo@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jesszhan0024@gmail.com>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>
Cc: Val Packett <val@packett.cool>,
Maximilian Luz <luzmaximilian@gmail.com>,
Jordan Crouse <jordan@cosmicpenguin.net>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/4] drm/msm/a6xx: Add GMU_SP_RF_CONTROL registers
Date: Mon, 2 Nov 2026 22:13:52 -0300 [thread overview]
Message-ID: <20261103011358.65398-4-val@packett.cool> (raw)
In-Reply-To: <20261103011358.65398-1-val@packett.cool>
These registers are used in the a680 hwcg init sequence downstream.
Add them to the XML register list in preparation for importing said
sequence.
Signed-off-by: Val Packett <val@packett.cool>
---
drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml b/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml
index 786fd7d2f674..11d57cb52ede 100644
--- a/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml
+++ b/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml
@@ -42,6 +42,8 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
<reg32 offset="0x1a880" name="GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL"/>
<reg32 offset="0x1a881" name="GMU_GX_SPTPRAC_POWER_CONTROL"/>
+ <reg32 offset="0x1a883" name="GMU_GX_GMU_SP_RF_CONTROL_0"/>
+ <reg32 offset="0x1a884" name="GMU_GX_GMU_SP_RF_CONTROL_1"/>
<reg32 offset="0x1b400" name="GMU_CM3_ITCM_START"/>
<reg32 offset="0x1c400" name="GMU_CM3_DTCM_START"/>
<reg32 offset="0x1cbf0" name="GMU_NMI_CONTROL_STATUS"/>
--
2.56.0
next prev parent reply other threads:[~2026-11-03 1:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 1:13 [PATCH 0/4] drm/msm/a6xx: Fixes for a680 (SC8180X) Val Packett
2026-11-03 1:13 ` [PATCH 1/4] drm/msm/a6xx: Restore GBIF CX config for A640 family Val Packett
2026-11-03 11:30 ` Konrad Dybcio
2026-11-03 1:13 ` [PATCH 2/4] drm/msm/a6xx: Fix GMEM range on a680 Val Packett
2026-11-03 1:13 ` Val Packett [this message]
2026-11-03 1:13 ` [PATCH 4/4] drm/msm/a6xx: Import a680 hwcg sequence from kgsl Val Packett
2026-11-03 1:39 ` Val Packett
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