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Similar with Aspeed 27x0. The JHB100 basic driver upstream is in progress: https://patchwork.kernel.org/project/linux-riscv/cover/20260910100357.130134-1-changhuang.liang@starfivetech.com/ JHB100 BMC soc contains Synopsys dwc3 multi-port host controller. And export its xhci controller to host server through PCIe. xhci contains 8 ports and each connect with one dwc3 device controller through an PHY adapter. Server host USB subsystem includes one multi-port dwc3 USB host, multiple dwc3 device controllers and their adapters. The simple arch graph is below. |----------------------------------------- |Server PCIe field | |(usb xhci working in server but it | | located in BMC soc) | | -------------------------------- | | | multi-port xhci controller| | | | ..... port7 port8 | | | --------------------^-----^----- | ------------------------|-----|----------- ------------------------|-----|----------- | ..... --------- --------- | | |adapter| |adapter| | | -----^--- -----^--- | | | | | | ------------ ------------| | ...... | device | |device || | |controller| |controller|| | ------------ ------------| | BMC field | ------------------------------------------ The patch base on kernel v7.4-rc1 previous verions link: v1: https://patchwork.kernel.org/project/linux-usb/patch/20260918071103.24482-2-minda.chen@starfivetech.com/ changes: v1: patch1 and patch2: Correct the title and add more descriptions. patch3: Correct the get iomem code and follow the comments by Thinh Minda Chen (3): dt-bindings: usb: starfive,jhb100-dwc3: Add adapter register region dt-bindings: usb: starfive,jhb100-dwc3: Add clock number limit usb: dwc3: starfive: Add JHB100 USB device adapter port enable quirk .../bindings/usb/starfive,jhb100-dwc3.yaml | 13 ++++- drivers/usb/dwc3/dwc3-generic-plat.c | 48 ++++++++++++++++++- 2 files changed, 59 insertions(+), 2 deletions(-) base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4 -- 2.17.1