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From: "Hongliang Yang (杨宏亮)" <hongliang.yang@cixtech.com>
To: "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Peter Chen" <peter.chen@kernel.org>,
	"Pawel Laszczak" <pawell@cadence.com>,
	"Roger Quadros" <rogerq@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Gary Yang (杨新伟)" <Gary.Yang@cixtech.com>,
	"Fugang Duan (段富刚)" <fugang.duan@cixtech.com>
Cc: "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	cix-kernel-upstream <cix-kernel-upstream@cixtech.com>,
	"Hongliang Yang (杨宏亮)" <hongliang.yang@cixtech.com>
Subject: [PATCH v5 3/3] arm64: dts: cix: Add USB4/USB5 nodes for Sky1
Date: Tue, 3 Nov 2026 07:49:43 +0000	[thread overview]
Message-ID: <20261103074929.1971195-4-hongliang.yang@cixtech.com> (raw)
In-Reply-To: <20261103074929.1971195-1-hongliang.yang@cixtech.com>

Add USB4 and USB5 controller nodes for the CIX Sky1 SoC. Enable USB4
and USB5 in host mode on the Radxa Orion O6 board.

The two controllers share the RCSU register region and their glue
registers are interleaved inside it, so the region is described by a
simple-bus container with an address-translating ranges property and
each controller maps its registers as offsets inside that region.

Signed-off-by: Hongliang Yang <hongliang.yang@cixtech.com>
---
v4 -> v5:
- Fixed continuation line indentation reported by checkpatch.
 arch/arm64/boot/dts/cix/sky1-orion-o6.dts | 42 ++++++++++
 arch/arm64/boot/dts/cix/sky1.dtsi         | 95 +++++++++++++++++++++++
 2 files changed, 137 insertions(+)

diff --git a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
index 5d57dd9ea299..d07fad302050 100644
--- a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
+++ b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
@@ -80,6 +80,22 @@ pins {
 
 		};
 	};
+
+	pinctrl_usb4: usb4-power-on-cfg {
+		pins {
+			bias-pull-down;
+			drive-strength = <8>;
+			pinmux = <CIX_PAD_GPIO041_FUNC_USB_DRIVE_VBUS4>;
+		};
+	};
+
+	pinctrl_usb5: usb5-power-on-cfg {
+		pins {
+			bias-pull-down;
+			drive-strength = <8>;
+			pinmux = <CIX_PAD_GPIO042_FUNC_USB_DRIVE_VBUS5>;
+		};
+	};
 };
 
 &pcie_x8_rc {
@@ -118,6 +134,32 @@ &uart2 {
 	status = "okay";
 };
 
+&usb4 {
+	pinctrl-0 = <&pinctrl_usb4>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&usbss_4 {
+	dr_mode = "host";
+
+	status = "okay";
+};
+
+&usb5 {
+	pinctrl-0 = <&pinctrl_usb5>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&usbss_5 {
+	dr_mode = "host";
+
+	status = "okay";
+};
+
 &usb3_phy4 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index 06a311ee14ef..c10db0ff9af6 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -17,6 +17,11 @@ / {
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		usb4 = &usb4;
+		usb5 = &usb5;
+	};
+
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -606,6 +611,96 @@ mbox_ap2sfh: mailbox@80a0000 {
 			cix,mbox-dir = "tx";
 		};
 
+		usbss_rcsu: usb-rcsu@91c0300 {
+			compatible = "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x00 0x00000000 0x00 0x091c0300 0x00 0x150>,
+				<0x00 0x091d0000 0x00 0x091d0000 0x00 0x20000>;
+
+			usb4: usb@14 {
+				compatible = "cix,sky1-usbssp";
+				reg = <0x00 0x14 0x00 0x10>,
+				      <0x00 0x100 0x00 0x10>;
+				reg-names = "axi", "status";
+				ranges;
+				#address-cells = <2>;
+				#size-cells = <2>;
+				clocks = <&scmi_clk CLK_TREE_USB3A_H0_CLK_SOF>,
+					<&scmi_clk CLK_TREE_USB3A_0_AXI_GATE>,
+					<&scmi_clk CLK_TREE_USB3A_H0_CLK_LPM>,
+					<&scmi_clk CLK_TREE_USB3A_0_APB_GATE>;
+				clock-names = "sof", "axi", "lpm", "apb";
+				resets = <&s5_syscon SKY1_USBC_SS2_PRST_N>,
+					<&s5_syscon SKY1_USBC_SS2_RST_N>;
+				reset-names = "apb", "core";
+				cix,usb-syscon = <&s5_syscon>;
+
+				status = "disabled";
+
+				usbss_4: usb@91d0000 {
+					compatible = "cdns,usb3";
+					reg = <0x00 0x91d0000 0x00 0x4000>,
+					      <0x00 0x91d8000 0x00 0x8000>,
+					      <0x00 0x91d4000 0x00 0x4000>;
+					reg-names = "otg", "xhci", "dev";
+					dr_mode = "otg";
+					interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>,
+						<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>,
+						<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH 0>,
+						<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>;
+					interrupt-names = "host", "peripheral",
+						"otg", "wakeup";
+					maximum-speed = "super-speed-plus";
+					phys = <&usb3_phy4_0>;
+					phy-names = "cdns3,usb3-phy";
+
+					status = "disabled";
+				};
+			};
+
+			usb5: usb@24 {
+				compatible = "cix,sky1-usbssp";
+				reg = <0x00 0x24 0x00 0x10>,
+				      <0x00 0x110 0x00 0x10>;
+				reg-names = "axi", "status";
+				ranges;
+				#address-cells = <2>;
+				#size-cells = <2>;
+				clocks = <&scmi_clk CLK_TREE_USB3A_H1_CLK_SOF>,
+					<&scmi_clk CLK_TREE_USB3A_1_AXI_GATE>,
+					<&scmi_clk CLK_TREE_USB3A_H1_CLK_LPM>,
+					<&scmi_clk CLK_TREE_USB3A_1_APB_GATE>;
+				clock-names = "sof", "axi", "lpm", "apb";
+				resets = <&s5_syscon SKY1_USBC_SS3_PRST_N>,
+					<&s5_syscon SKY1_USBC_SS3_RST_N>;
+				reset-names = "apb", "core";
+				cix,usb-syscon = <&s5_syscon>;
+
+				status = "disabled";
+
+				usbss_5: usb@91e0000 {
+					compatible = "cdns,usb3";
+					reg = <0x00 0x91e0000 0x00 0x4000>,
+					      <0x00 0x91e8000 0x00 0x8000>,
+					      <0x00 0x91e4000 0x00 0x4000>;
+					reg-names = "otg", "xhci", "dev";
+					dr_mode = "otg";
+					interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>,
+						<GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>,
+						<GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH 0>,
+						<GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>;
+					interrupt-names = "host", "peripheral",
+						"otg", "wakeup";
+					maximum-speed = "super-speed-plus";
+					phys = <&usb3_phy4_1>;
+					phy-names = "cdns3,usb3-phy";
+
+					status = "disabled";
+				};
+			};
+		};
+
 		usb3_phy4: usb-phy@9210000 {
 			compatible = "cix,sky1-usb3-phy";
 			reg = <0x00 0x09210000 0x00 0x40000>;
-- 
2.54.0

  parent reply	other threads:[~2026-11-03  7:49 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03  7:49 [PATCH v5 0/3] usb: cdns3: Add CIX Sky1 USBSSP controller support Hongliang Yang (杨宏亮)
2026-11-03  7:49 ` [PATCH v5 1/3] dt-bindings: usb: Add CIX Sky1 USBSSP controller Hongliang Yang (杨宏亮)
2026-11-03  7:49 ` Hongliang Yang (杨宏亮) [this message]
2026-11-03  7:49 ` [PATCH v5 2/3] usb: cdns3: Add CIX Sky1 glue driver Hongliang Yang (杨宏亮)
2026-11-03  8:43   ` Philipp Zabel

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