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Co-developed-by: Lianfeng Ouyang Signed-off-by: Lianfeng Ouyang Signed-off-by: Alex Soo Signed-off-by: Changhuang Liang --- drivers/pinctrl/starfive/Kconfig | 11 +++ drivers/pinctrl/starfive/Makefile | 1 + .../starfive/pinctrl-starfive-jhb100-adc0.c | 85 +++++++++++++++++++ 3 files changed, 97 insertions(+) create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-adc0.c diff --git a/drivers/pinctrl/starfive/Kconfig b/drivers/pinctrl/starfive/Kconfig index 7ff506a15dd8..1622cc73d9ae 100644 --- a/drivers/pinctrl/starfive/Kconfig +++ b/drivers/pinctrl/starfive/Kconfig @@ -54,6 +54,17 @@ config PINCTRL_STARFIVE_JHB100 select GPIOLIB select GPIOLIB_IRQCHIP +config PINCTRL_STARFIVE_JHB100_ADC0 + tristate "StarFive JHB100 SoC ADC-0 pinctrl and GPIO driver" + depends on ARCH_STARFIVE || COMPILE_TEST + select PINCTRL_STARFIVE_JHB100 + default m if ARCH_STARFIVE + help + Say yes here to support ADC-0 pin control on the StarFive JHB100 SoC. + This also provides an interface to the GPIO pins not used by other + peripherals supporting inputs, outputs, configuring pull-up/pull-down + and interrupts on input changes. + config PINCTRL_STARFIVE_JHB100_PER0 tristate "StarFive JHB100 SoC Peripheral-0 pinctrl and GPIO driver" depends on ARCH_STARFIVE || COMPILE_TEST diff --git a/drivers/pinctrl/starfive/Makefile b/drivers/pinctrl/starfive/Makefile index 351fce524fec..1113e73657d7 100644 --- a/drivers/pinctrl/starfive/Makefile +++ b/drivers/pinctrl/starfive/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_SYS) += pinctrl-starfive-jh7110-sys.o obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_AON) += pinctrl-starfive-jh7110-aon.o obj-$(CONFIG_PINCTRL_STARFIVE_JHB100) += pinctrl-starfive-jhb100.o +obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_ADC0) += pinctrl-starfive-jhb100-adc0.o obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_PER0) += pinctrl-starfive-jhb100-per0.o obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_PER1) += pinctrl-starfive-jhb100-per1.o obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_PER2) += pinctrl-starfive-jhb100-per2.o diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-adc0.c b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-adc0.c new file mode 100644 index 000000000000..8aaa4fca52e6 --- /dev/null +++ b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-adc0.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Pinctrl / GPIO driver for StarFive JHB100 SoC ADC-0 domain + * + * Copyright (C) 2024 StarFive Technology Co., Ltd. + * Author: Alex Soo + * + */ + +#include + +#include "pinctrl-starfive-jhb100.h" + +static const struct jhb100_pin_layout_desc jhb100_adc0_pl_desc[] = { + { .pin_start = 0, .pin_cnt = 8, .name = "gpio", .gpio_func_sel = 0 }, + { 0xff }, +}; + +static const struct config_reg_layout_desc jhb100_adc0_pinctrl_crl_desc[] = { + { + .pin_start = 0, + .pin_cnt = 8, + .fields[PAD_CFG_DRIVE_STRENGTH_3BIT] = { .shift = 0, .width = 3 }, + .fields[PAD_CFG_INPUT_ENABLE] = { .shift = 3, .width = 1 }, + .fields[PAD_CFG_PULL_DOWN] = { .shift = 4, .width = 1 }, + .fields[PAD_CFG_PULL_UP] = { .shift = 5, .width = 1 }, + .fields[PAD_CFG_SLEW_RATE] = { .shift = 6, .width = 1 }, + .fields[PAD_CFG_SCHMITT_TRIGGER_SELECT] = { .shift = 7, .width = 1 }, + .fields[PAD_CFG_DEBOUNCE_WIDTH] = { .shift = 15, .width = 17 }, + }, + { 0xff }, +}; + +static const struct starfive_pinctrl_regs jhb100_adc0_pinctrl_regs = { + .func_sel = { .reg = 0x2c, .width_per_pin = 2 }, + .config = 0x00, + .output = 0x20, + .output_en = 0x24, + .gpio_status = 0x28, + .irq_en = 0x30, + .irq_status = 0x34, + .irq_clr = 0x38, + .irq_trigger = 0x3c, + .irq_level = 0x40, + .irq_both_edge = 0x44, + .irq_edge = 0x48, +}; + +static const struct jhb100_pinctrl_func_maps jhb100_func_maps_adc0[] = { + { .func = "adc", .val = 1 }, + { .func = "gpio", .val = 0 }, + { .func = "host0_port80", .val = 3 }, + { .func = "smbalert", .val = 2 }, +}; + +static const struct jhb100_pinctrl_domain_info jhb100_adc0_pinctrl_info = { + .name = "jhb100-adc0", + .pl_desc = jhb100_adc0_pl_desc, + .crl_desc = jhb100_adc0_pinctrl_crl_desc, + .regs = &jhb100_adc0_pinctrl_regs, + .fmaps = jhb100_func_maps_adc0, + .num_maps = ARRAY_SIZE(jhb100_func_maps_adc0), +}; + +static const struct of_device_id jhb100_adc0_pinctrl_of_match[] = { + { + .compatible = "starfive,jhb100-adc0-pinctrl", + .data = &jhb100_adc0_pinctrl_info, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, jhb100_adc0_pinctrl_of_match); + +static struct platform_driver jhb100_adc0_pinctrl_driver = { + .probe = jhb100_pinctrl_probe, + .driver = { + .name = "starfive-jhb100-adc0-pinctrl", + .of_match_table = jhb100_adc0_pinctrl_of_match, + }, +}; +module_platform_driver(jhb100_adc0_pinctrl_driver); + +MODULE_DESCRIPTION("Pinctrl driver for StarFive JHB100 SoC ADC-0 domain"); +MODULE_AUTHOR("Alex Soo "); +MODULE_LICENSE("GPL"); -- 2.25.1