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Bottomley" , "Martin K. Petersen" , Sai Krishna Potthuri , Ajay Neeli , Manivannan Sadhasivam , Pedro Sousa , Adrian Hunter , Can Guo , Asutosh Das Cc: imx@lists.linux.dev, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, clizzi@redhat.com, aruizrui@redhat.com, eballetb@redhat.com, echanude@redhat.com Subject: [PATCH v10 00/11] Add S32N79RDB UFS support Date: Tue, 3 Nov 2026 14:32:04 +0100 Message-ID: <20261103133215.1385823-1-larisa.grigore@oss.nxp.com> X-Mailer: git-send-email 2.43.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: AS4P192CA0001.EURP192.PROD.OUTLOOK.COM (2603:10a6:20b:5da::15) To GV2PR04MB12558.eurprd04.prod.outlook.com (2603:10a6:150:368::10) X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR04MB12558:EE_|AM9PR04MB7634:EE_ X-MS-Office365-Filtering-Correlation-Id: 0ee39d48-4efb-4bdf-89d5-08df39aee89e X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016|23010399003|7416014|19092799006|921020|261102123227099003|261021121427099003|261102130727099003|11063799006|261021123027099003|56012099006|261009223027099003|261028144727099003|261026121527099003|261022075727099003|261026140227099003|261022105027099003|10067099003|18002099003|6133799003|3023799007; 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The controller is based on the Synopsys DesignWare (DWC) UFS host architecture and requires S32N79-specific M-PHY initialization/calibration sequence. It is compliant with JESD-223D "Universal Flash Storage Host Controller Interface" v3.0, and supports up to HS-Gear 4 speed grade. It is compatible with UFS 2.1, 3.0 and 3.1 devices. The MIPI UniPro is compliant with "MIPI Alliance Specification for Unified Protocol", v1.8. The MIPI M-PHY is compliant to version 4.1. In order to keep the S32N79 platform driver small and avoid duplicating common DWC code across platform glue drivers, the series also refactors and exports a few reusable DWC helpers. In particular, M-PHY CREG (CBCREG*) register access helpers are moved from the existing AMD Versal2 glue driver into the common ufshcd-dwc layer, and are then used by the platform drivers. The series also introduces a generic Hibern8 TX-FSM polling helper so that multiple platforms can reuse the same pre-link checks. Device tree binding documentation for the S32N79 UFS controller is included. The SoC and board DTS updates that instantiate and enable the controller are no longer part of this series and will be posted separately. Changes in v10: All patches: - Dropped the "scsi:" subject prefix. ufs: core: Return a negative errno from WLUN suspend/resume: - New patch. __ufshcd_wl_suspend() and __ufshcd_wl_resume() may return a positive result code, e.g. from ufshcd_link_startup(). The runtime PM core treats it as a failure, but rpm_get_suppliers() only checks for a negative value, so the LUs consuming the WLUN are reported as resumed while the host is in the error state. Convert positive values to -EIO at the WLUN PM callback boundary, as ufshcd_init() already does. This replaces the Fixes: rationale previously carried by the dwc link_is_up() patch and covers every source of positive values, not only the DWC glue. ufs: dwc: Return a negative error if the link is down: - Dropped the Fixes: tag. The PM-boundary issue is now fixed in the core; this patch is a cleanup so the helper returns an errno before it is exported. ufs: unipro: Add TX/RX FSM state attributes: - Fixed the commit message: AMD Versal2 has no header with these definitions, only users in the .c file. ufs: core: Add common Hibern8 TX FSM polling helper: - Changed the subject prefix from "ufs: host:" to "ufs: core:". - Fixed the helper name in the commit message. - Renamed the internal per-lane poller from ufshcd_poll_tx_hibern8_lanes() to ufshcd_tx_lanes_in_hibern8(). - Log the TX_FSM_STATE of each lane that did not reach Hibern8 on timeout. - Moved the prototype to the non-extern declarations and dropped "extern". - Report a positive UIC result from DME_GET as -EIO, so the helper really returns a negative errno as documented. - Fixed checkpatch --strict alignment checks. - Dropped the Reviewed-by tags of Frank Li and Stanley Jhu, as the patch changed significantly. ufs: dwc: Move Versal2 M-PHY CREG access helpers into ufshcd-dwc: - Reworded the commit message and explained the static array race. - Use the "name() - description" kernel-doc style like the rest of the file. dt-bindings: ufs: Add NXP S32N79 UFS host controller: - Restricted lanes-per-direction to 2, matching the driver. - Explained in the commit message why clock-names and the single 0 Hz operating-points-v2 entry are required. ufs: s32n7: Add NXP S32N79 UFS host controller driver: - Changed the subject prefix to "ufs: s32n7:". - Added and . - Reject lanes-per-direction other than 2. - Dropped redundant error messages and the remove() wrapper. - Used u32 for the ufshcd_dme_get() result, aligned register offset style, clarified the SCM_STATUS comments. - Documented the PERFORM_LINK_STARTUP_ONCE quirk and spm_lvl in the commit message, and updated the HS rate-select bullet. - Documented in the commit message that the DWC BUSTHRTL power gating is disabled because it is not supported on this platform. Changes in v9: ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h: - Prefixed the RX_STATE_* and TX_STATE_* enum constants with UFS_ to avoid polluting the global namespace, and updated the existing users (AMD Versal2, HiSilicon, Qualcomm). ufs: host: Add common Hibern8 TX FSM polling helper: - Use the renamed UFS_TX_STATE_HIBERN8 constant. dt-bindings: ufs: Add NXP S32N79 UFS host controller: - Added Reviewed-by: Frank Li. MAINTAINERS: Add NXP S32N7 UFS host controller entry: - Added the imx@lists.linux.dev mailing list. arm64: dts: freescale: s32n79: Add UFS host controller: arm64: dts: freescale: s32n79-rdb: Enable UFS: - Dropped from this series, as requested; they will be sent separately. Changes in v8: ufs: host: Add common Hibern8 TX FSM polling helper: - Added Reviewed-by: Stanley Jhu. scsi: ufs: Add NXP S32N79 UFS host controller driver: - Let the UFS core manage the core reference clock: declare it in DT via clock-names/operating-points-v2 so the core adds it to hba->clk_list_head and gates it across system suspend and runtime idle. Dropped the manual devm_clk_get_enabled() and the struct s32n7_ufs core_clk member, and now read the clock rate from the core clock list. - Dropped the ufs_s32n7_calculate_us_tick() wrapper and inlined the division. - Dropped the unused struct s32n7_ufs hba member. dt-bindings: ufs: Add NXP S32N79 UFS host controller: - Added the required clock-names and operating-points-v2 properties. - Dropped the Reviewed-by and Acked-by tags. arm64: dts: freescale: s32n79: Add UFS host controller: - Added clock-names = "core" and an operating-points-v2 table with opp-hz = <0> (fixed-rate clock) so the UFS core manages (and gates) the core reference clock. Changes in v7: scsi: ufs: Add NXP S32N79 UFS host controller driver: - Wrapped .prepare/.complete in pm_sleep_ptr() instead of pm_ptr(). - Fixed code alignment issues. Changes in v6: scsi: ufs: dwc: Return a negative error if the link is down: - Translate a positive UIC command result from ufshcd_dme_get() into -EIO. - Declare dme_result as u32 to match the ufshcd_dme_get() parameter type. scsi: ufs: dwc: Sort CBCRCTRL and CBREFCLKCTRL2 by offset: - Added Reviewed-by: Frank Li. scsi: ufs: Add NXP S32N79 UFS host controller driver: - Added Reviewed-by: Frank Li. Changes in v5: scsi: ufs: dwc: Sort CBCRCTRL and CBREFCLKCTRL2 by offset: - New patch. Split the macro reorder into its own cleanup. ufs: host: Add common Hibern8 TX FSM polling helper: - Return the real poller error on timeout, not a forced -ETIMEDOUT. dt-bindings: ufs: Add NXP S32N79 UFS host controller: - Dropped the jedec,ufs-2.0 fallback. - Removed the select: block and the clocks description. scsi: ufs: Add NXP S32N79 UFS host controller driver: - Documented the timeout values as driver-defined bounds. - Wrapped .prepare/.complete in pm_ptr(). arm64: dts: freescale: s32n79: Add UFS host controller: - Dropped the jedec,ufs-2.0 fallback. Changes in v4: scsi: ufs: dwc: Return a negative error if the link is down: - New patch. ufshcd_dwc_link_is_up() now returns a negative errno on failure instead of a positive value. ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h - Added Reviewed-by: Frank Li. ufs: host: Add common Hibern8 TX FSM polling helper: - Refactored ufshcd_dme_check_tx_hibern8() to use read_poll_timeout(). scsi: ufs: Move Versal2 M-PHY CREG access helpers into ufshcd-dwc: - Added Reviewed-by: Frank Li. dt-bindings: ufs: Add NXP S32N79 UFS host controller: - Added Reviewed-by: Frank Li. Changes in v3: ufs: host: Add common Hibern8 TX FSM polling helper: - Use -EAGAIN while polling and only normalize to -ETIMEDOUT on timeout, so real attribute-read errors are returned instead of masked. - Drop the stray delay.h include in ufshcd-pltfrm.c; the helper lives in ufshcd.c. - Drop the now-redundant dev_err() after the check in the HiSilicon driver. scsi: ufs: Add NXP S32N79 UFS host controller driver: - Use devm_clk_get_enabled() to enable the core reference clock. - Rename the family-level identifiers from the s32n_ prefix to s32n7_ (structs and functions), keeping the s32n79_ prefix only for the chip-specific data. Changes in v2: ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h: - Improved the enum comments. They now cite the MIPI M-PHY v6.0 tables. ufs: unipro: Add TX/RX FSM state attributes: - Added Reviewed-by: Frank Li. ufs: host: Add common Hibern8 TX FSM polling helper: - Moved the helper into the UFS core (ufshcd.c). - Split out an inner per-lane poller, ufshcd_poll_tx_hibern8_lanes(). - Expanded the commit message to document the -ETIMEDOUT normalization done when converting the qcom/hisi checks to the helper. No code behaviour change. scsi: ufs: Move Versal2 M-PHY CREG access helpers into ufshcd-dwc: - Made the DME attribute arrays const. They are now initialized inline instead of by later field assignments. scsi: ufs: dwc: Export common clock divider and link status helpers: - Added Reviewed-by: Frank Li. dt-bindings: ufs: Add NXP S32N79 UFS host controller: - Renamed the patch subject and simplified the commit message. - Renamed the binding file to nxp,s32n79-ufshc.yaml so it matches the nxp,s32n79-ufshc compatible string. - Removed the nxp,mphy-boot-mode property. - Made reg-names and clocks required. - Removed the conditional if/then/else schema. - Removed clock-names. - Changed the compatible from jedec,ufs-3.0 to jedec,ufs-2.0. - Updated the example clocks to <&clks 0x92>. scsi: ufs: Add NXP S32N79 UFS host controller driver: - Removed the nxp,mphy-boot-mode handling and the mphy_boot_mode enum. The M-PHY firmware always runs from ROM now. - Added a struct s32n_soc_data for SoC match data. - Moved the calibration writes out to static const tables. - Renamed struct phy_reg_cfg to s32n_phy_reg. - Moved the rate-select sequence out of link_startup_post_change() into a new pwr_change_notify() pre-change path. - Used devm_clk_get(dev, NULL) and dropped the redundant core_clk NULL check. - Switched to *_PM_OPS() macros and pm_ptr() for the PM ops. - Clarified the Hibern8 poll timeout comment. - Enabled Auto-Hibern8 instead of setting UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8. - Reworked and improved the M-PHY initialization sequence. arm64: dts: freescale: s32n79: Add UFS host controller: - Changed the compatible from jedec,ufs-3.0 to jedec,ufs-2.0. - Removed clock-names. arm64: dts: freescale: s32n79-rdb: Enable UFS: - Removed the nxp,mphy-boot-mode property. Larisa Grigore (11): ufs: core: Return a negative errno from WLUN suspend/resume ufs: dwc: Return a negative error if the link is down ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h ufs: unipro: Add TX/RX FSM state attributes ufs: core: Add common Hibern8 TX FSM polling helper ufs: dwc: Move Versal2 M-PHY CREG access helpers into ufshcd-dwc ufs: dwc: Export common clock divider and link status helpers dt-bindings: ufs: Add NXP S32N79 UFS host controller ufs: dwc: Sort CBCRCTRL and CBREFCLKCTRL2 by offset ufs: s32n7: Add NXP S32N79 UFS host controller driver MAINTAINERS: Add NXP S32N7 UFS host controller entry .../bindings/ufs/nxp,s32n79-ufshc.yaml | 68 +++ MAINTAINERS | 9 + drivers/ufs/core/ufshcd.c | 101 +++- drivers/ufs/host/Kconfig | 12 + drivers/ufs/host/Makefile | 1 + drivers/ufs/host/ufs-amd-versal2.c | 97 +--- drivers/ufs/host/ufs-hisi.c | 48 +- drivers/ufs/host/ufs-hisi.h | 6 - drivers/ufs/host/ufs-nxp-s32n7.c | 537 ++++++++++++++++++ drivers/ufs/host/ufs-qcom.c | 42 +- drivers/ufs/host/ufs-qcom.h | 2 - drivers/ufs/host/ufshcd-dwc.c | 86 ++- drivers/ufs/host/ufshcd-dwc.h | 39 +- drivers/ufs/host/ufshci-dwc.h | 6 + include/ufs/ufshcd.h | 2 + include/ufs/unipro.h | 22 + 16 files changed, 876 insertions(+), 202 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/nxp,s32n79-ufshc.yaml create mode 100644 drivers/ufs/host/ufs-nxp-s32n7.c -- 2.43.0