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Patch (1/2): restructures the driver to support up to 8 independent RX flows per EMAC interface. Each flow gets its own NAPI instance, IRQ, hrtimer, page pool, and XDP/AF_XDP context while sharing a single UDMA channel and descriptor pool. AF_XDP zero-copy is updated to track per-flow pools via a bitmap, and per-flow page pool recycling is fixed by storing the flow_id in prueth_swdata. Patch (2/2): adds ethtool ETHTOOL_SRXCLSRLINS/SRXCLSRLDEL/SRXCLSRLALL support. Rules match on EtherType (ETHER_FLOW) and steer matched frames to a user-specified RX queue via ICSSG FT3 hardware content filters and the 16-entry classifier table. The classifier N result maps directly to UDMA flow rx_flow_id_base+N, so queue steering takes effect in hardware without per-packet CPU involvement. Tested on AM64x EVM (SR2), both eth1 (PRU0/slice0) and eth2 (PRU1/slice1) with 8 RX flows. Verified via /proc/interrupts IRQ deltas: ethtool -N eth2 flow-type ether proto 0x0800 action 2 → flow2 +123 frames ethtool -N eth2 flow-type ether proto 0x0806 action 3 → flow3 +26 frames default flow0 leakage: +2 Meghana Malladi (2): icssg: Add multi-flow RX support with per-flow NAPI and classification icssg: Add ethtool RX flow classification support .../net/ethernet/ti/icssg/icssg_classifier.c | 340 +++++++++++++++++ drivers/net/ethernet/ti/icssg/icssg_common.c | 359 ++++++++++-------- drivers/net/ethernet/ti/icssg/icssg_config.h | 7 +- drivers/net/ethernet/ti/icssg/icssg_ethtool.c | 65 +++- drivers/net/ethernet/ti/icssg/icssg_prueth.c | 281 +++++++------- drivers/net/ethernet/ti/icssg/icssg_prueth.h | 93 +++-- .../net/ethernet/ti/icssg/icssg_prueth_sr1.c | 4 +- 7 files changed, 831 insertions(+), 318 deletions(-) base-commit: 7b6ab4dbc156e2f96419715130b3d5738a306c93 -- 2.43.0