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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1ac1a9e2ed3sm41634001c88.19.2026.11.03.05.55.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2026 05:55:24 -0800 (PST) From: Shawn Guo To: Bjorn Andersson Cc: Konrad Dybcio , Abel Vesa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Dhruvin Rajpura , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH RFC v2 1/2] arm64: dts: qcom: nord-ride-embedded: Add PMIC ADC thermistor channels Date: Tue, 3 Nov 2026 21:54:44 +0800 Message-ID: <20261103135445.2049110-2-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261103135445.2049110-1-shengchao.guo@oss.qualcomm.com> References: <20261103135445.2049110-1-shengchao.guo@oss.qualcomm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: It8PhN7a_UuWEhKhha3UKbyQFGgYHQWQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTAzMDA1NSBTYWx0ZWRfX2q5/210x0wOO b4Z+gj0vYe8ZPEcXI1LjwZSkPbqCPUTkv4j5WnfAGlySwHfbyd1xRNljZBwW8XwSCBmYV8nMAKx +zL+LZNpgKXK6UZrIIMa8TPlVvBioxJKFZlEUDiWH2DSXi+HACnK0pJyvA+qwlN78nyeEs+NCMf nE9fB/EgRK1eCXkOdFtW+3/GdFnaDjcJf2LCTD1cbAI/9S5BiRJU68FKcdkx+ecirrHtixpkvnP OxMpjM65poQhn+hx70gzyeV5hquOFqk5FG2vPEd0Uinjne/zyKOUNutLGdKoE/8V8dwWJRcEORT /jAsrtI22HWSHM8myuVdTlq1dwOE2/2kNUAZdSVLRYoFkEpniyqeLPle9GKO7MiMm2B6qP4st9I LOPFcqjdH9a4KwssLnm4sD8QU3zB6grDH232AXVvgoQXec9LOUXpPT8ZGiI6Nd12pvf1dJTi4Mm okswbAGKa5gOL17Bx8A== X-Proofpoint-Spam-Info: AW1haW4tMjYxMTAzMDA1NSBTYWx0ZWRfX6G5FeJg/zRVB bLCNTJ0q+xe3x3jRdhPzNkzABzT5ccxLcczk92TX6GXh7dSCdoh9x2R6o3+MJQrh/SvfuHzkA0u 9cZQSMLO7qMNc2mutA5byzOPIgYcacg= X-Proofpoint-GUID: It8PhN7a_UuWEhKhha3UKbyQFGgYHQWQ X-Authority-Analysis: v=2.4 cv=NZlzRGD4 c=1 sm=1 tr=0 ts=6ae9e7cf cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=TEmDzvwZ9EAiO1TzxhoA:9 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-03_02,2026-11-03_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 phishscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2611030055 From: Dhruvin Rajpura The PMAU0102 (Kai_MV) ADC5 Gen3 controllers only expose the REF_GND/1P25VREF/DIE_TEMP calibration channels, so no board thermistor feeds the thermal framework. On Nord Ride, three Kai AMUX pins are wired to thermistors: Kai instance E's AMUX1 (SDRAM3 THERM) and Kai instance I's AMUX1/AMUX2 (SDRAM1 THERM, UFS THERM). The remaining Kai AMUX pins monitor voltage rails. Mark all Kai ADCs as thermal sensor providers in the PMIC dtsi, as it is a PMIC capability, and describe the thermistor channels with qcom,adc-tm and their thermal zones in the board DT, since the wiring is board specific. Signed-off-by: Dhruvin Rajpura Signed-off-by: Shawn Guo --- .../boot/dts/qcom/nord-ride-embedded.dts | 84 +++++++++++++++++++ arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi | 8 ++ 2 files changed, 92 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts index 49635695f832..550cd7fe0ac1 100644 --- a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts +++ b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts @@ -53,6 +53,62 @@ bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk { clock-div = <2>; }; }; + + thermal-zones { + sdram3_thermal: sdram3-thermal { + thermal-sensors = <&pmau0102_e_adc ADC5_GEN3_AMUX1_THM_100K_PU(4)>; + + trips { + trip0 { + temperature = <70000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip1 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + + sdram1_thermal: sdram1-thermal { + thermal-sensors = <&pmau0102_i_adc ADC5_GEN3_AMUX1_THM_100K_PU(8)>; + + trips { + trip0 { + temperature = <70000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip1 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + + ufs_thermal: ufs-thermal { + thermal-sensors = <&pmau0102_i_adc ADC5_GEN3_AMUX2_THM_100K_PU(8)>; + + trips { + trip0 { + temperature = <70000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip1 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + }; }; &apps_rsc { @@ -366,6 +422,34 @@ vreg_l3l_1p8: ldo3 { }; }; +&pmau0102_e_adc { + channel@444 { + reg = ; + label = "pmau0102_e_sdram3_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,adc-tm; + }; +}; + +&pmau0102_i_adc { + channel@844 { + reg = ; + label = "pmau0102_i_sdram1_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,adc-tm; + }; + + channel@845 { + reg = ; + label = "pmau0102_i_ufs_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,adc-tm; + }; +}; + &qupv3_0 { firmware-name = "qcom/nord/qupv3fw.elf"; diff --git a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi index 47ea145f4abb..26c4d126a23b 100644 --- a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi +++ b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi @@ -31,6 +31,7 @@ pmau0102_e_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0x4 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@400 { reg = ; @@ -84,6 +85,7 @@ pmau0102_f_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0x5 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@500 { reg = ; @@ -137,6 +139,7 @@ pmau0102_g_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0x6 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@600 { reg = ; @@ -190,6 +193,7 @@ pmau0102_h_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0x7 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@700 { reg = ; @@ -243,6 +247,7 @@ pmau0102_i_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0x8 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@800 { reg = ; @@ -296,6 +301,7 @@ pmau0102_j_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0x9 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@900 { reg = ; @@ -349,6 +355,7 @@ pmau0102_k_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0xa 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@a00 { reg = ; @@ -402,6 +409,7 @@ pmau0102_l_adc: adc@7200 { #size-cells = <0>; interrupts-extended = <&spmi_bus 0xb 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@b00 { reg = ; -- 2.43.0