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Tue, 3 Nov 2026 09:12:40 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.2562.56 via Frontend Transport; Tue, 3 Nov 2026 09:12:35 -0800 From: Tariq Toukan To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , , Paolo Abeni CC: Akiva Goldberger , Carolina Jubran , Cosmin Ratiu , Edward Srouji , Gal Pressman , Leon Romanovsky , open list , , Mark Bloch , Moshe Shemesh , Or Har-Toov , Patrisious Haddad , Saeed Mahameed , Shay Drory , Tariq Toukan Subject: [PATCH net-next 10/15] net/mlx5: LAG, do not add a device to an already-active LAG Date: Tue, 3 Nov 2026 19:10:04 +0200 Message-ID: <20261103171009.563034-11-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20261103171009.563034-1-tariqt@nvidia.com> References: <20261103171009.563034-1-tariqt@nvidia.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM3PEPF000265B2:EE_|CHBPR12MB780315:EE_ X-MS-Office365-Filtering-Correlation-Id: 7b01a038-e366-4fab-a522-08df39cdbfc8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|376014|1800799024|82310400026|36860700016|5023799004|11063799006|261022113327099003|56012099006|261009223027099003|261022105027099003|261102123227099003|261021121427099003|261022075727099003|261026121527099003|261028144727099003|261026140227099003|10067099003|18002099003|22082099003|6133799003; X-Microsoft-Antispam-Message-Info: UEALRnLG3/2yQSArYf/bQcVgwPuLw3o8uzLWnqXaVaQeNZBy7nOXTNRXjwObHCOiiPVc/0s/ITlMhTXx1XdP0gnphPt1u5HeDe1yAponkky9gQHZSH1xXo8P7Nb7PBHLYKCS9GC3PddiAgLvHq7grkG5pdtjDOsWo84RxD7qnuVd4yfXHesObiCtHtyP0ma3XBDGrp9xXkgJFFG1MmlG8N2j6rfEyp3f3CBlvaPUtg79tLLkY3tt6QVTaaoD1d87rwutvcrhGPGMdXKL4G2deBO3twDGbwrjSlWWQ9x+EuJyArfWH5kQ8zH3Ba4Xy7LfnBJrDr5ukPt8saZoocjv+pBjlCNqLrPRhKAZ51GpHaY1SHrMaxiV3MP6dazLaM1Jqbe15QXWMtuNQjCdI8yLnHcSxPHYd3N60LgCfH/eU7VNrmpft/MWBRyzGg4JcW2wfPgICTaaiZi6AWtNrh9BcPEiilPC0XkgBcilPbwcYHwYwT07ZhxESj899duiUHy6Nv+vH7ZSmKlPxpAwXDCXneoOst7z7vGamMsCjNf30Sc7y9TgPpFYb3lvgqZ9T+ZmB9fpTy8GZ1hu6oC5HBhMq4+//9fsT6AVBoEEyGpd5m3dfM/cwUA8HOTtwvIBuIfyTNjjagl8rR0GDb6H4+af0jR8V2hOd6WPuLsoE+ru1/Iu7om/GcZzMO42tLM7KV/TcK1Ke7gdkeQUJzKTbZc6OA== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(23010399003)(376014)(1800799024)(82310400026)(36860700016)(5023799004)(11063799006)(261022113327099003)(56012099006)(261009223027099003)(261022105027099003)(261102123227099003)(261021121427099003)(261022075727099003)(261026121527099003)(261028144727099003)(261026140227099003)(10067099003)(18002099003)(22082099003)(6133799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oureSJ7OKDiE4biymP7Ep465kpo0OnjbmvVZ5JrMJbCbGd6aHw7NQOKLPvAZWcErGmRtKZ3c1C7STQHpTEy4MzVmf2nrcdg6ajuYUA9lo+qAnF0lhtZyvUaAcXMdGpsH0iKUxlzXWFLo61dvmC+RQOA91l3221z2tC7rE4ZCPxkaT0RffXtDeLtQLyrcqGFQj3vl0ku8zoXTwzG31WUvj7HKdd5wPVwpvkpiz2IqE4+kmcZq8BedcPrfSiLNHIXQSbrdg4wdMS5xinOkSTNVm8Q+PXjiAWqSP/S1N5w5SfR2Ib9yH7xXFtGO55ONV4VtXf2WJk0Srb1tW8kl2ZyJZWzknYeEnYMaUzmGqeOUIfWOdlzBpdSRtkp6sA+WjV4xDbEOF8KfpcMNkELi9aMfDRe0Qn1uIYAf3qiVfKu7y53CVSNbu3ZAbchEWD1WmYVz X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2026 17:13:15.7221 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b01a038-e366-4fab-a522-08df39cdbfc8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM3PEPF000265B2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CHBPR12MB780315 From: Shay Drory mlx5_ldev_add_mdev() would add a newly probed device to the LAG even when the LAG is already active, mutating membership while getters may be iterating it and while the active mapping assumes a fixed member set. Reject the join when the group's LAG is active: __mlx5_lag_dev_add_mdev() returns -EOPNOTSUPP, and mlx5_lag_add_mdev() treats that as terminal - unregister the HCA devcom component and leave the device standalone, rather than the -EAGAIN retry used for the bounded mode-change window. The device stays out of the LAG until it is reprobed. This keeps LAG membership stable while active. It is a no-op for existing configurations, where no device is added to a LAG once it is active. In addition, do not register the eswitch devcom component of such a device, so it does not pair with the eswitches of the LAG members. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Reviewed-by: Moshe Shemesh Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/eswitch_offloads.c | 4 ++++ drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c | 9 +++++++++ drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h | 5 +++++ 3 files changed, 18 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c index c712848b202d..70e6dd9561a6 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c @@ -3573,6 +3573,10 @@ void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, xa_init(&esw->offloads.peer_flows); mutex_init(&esw->offloads.peer_mutex); + /* do not pair a virt LAG capable VF/SF that is not part of a LAG */ + if (!mlx5_core_is_pf(esw->dev) && mlx5_virt_lag_nonmember(esw->dev)) + return; + if (!MLX5_CAP_ESW(esw->dev, merged_eswitch)) return; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c index 9bc4a929cef3..d73bac8441f7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -2449,6 +2449,11 @@ static int __mlx5_lag_dev_add_mdev(struct mlx5_core_dev *dev) mutex_unlock(&ldev->lock); return -EAGAIN; } + + if (mlx5_virt_lag_is_supported(dev) && __mlx5_lag_is_active(ldev)) { + mutex_unlock(&ldev->lock); + return -EOPNOTSUPP; + } mlx5_ldev_get(ldev); err = mlx5_ldev_add_mdev(ldev, dev, 0); if (err) { @@ -2537,6 +2542,10 @@ void mlx5_lag_add_mdev(struct mlx5_core_dev *dev) err = __mlx5_lag_dev_add_mdev(dev); mlx5_devcom_comp_unlock(dev->priv.hca_devcom_comp); + if (err == -EOPNOTSUPP) { + mlx5_lag_unregister_hca_devcom_comp(dev); + return; + } if (err) { msleep(100); goto recheck; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h index cbe380ae8bf9..385c767e24ae 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h @@ -280,6 +280,11 @@ static inline bool mlx5_virt_lag_is_supported(const struct mlx5_core_dev *dev) return true; } +static inline bool mlx5_virt_lag_nonmember(struct mlx5_core_dev *dev) +{ + return mlx5_virt_lag_is_supported(dev) && !mlx5_lag_dev(dev); +} + static inline bool mlx5_lag_is_supported(struct mlx5_core_dev *dev) { if (!MLX5_CAP_GEN(dev, vport_group_manager) || -- 2.44.0