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Miller" , Eric Dumazet , Jakub Kicinski , , Paolo Abeni CC: Akiva Goldberger , Carolina Jubran , Cosmin Ratiu , Edward Srouji , Gal Pressman , Leon Romanovsky , open list , , Mark Bloch , Moshe Shemesh , Or Har-Toov , Patrisious Haddad , Saeed Mahameed , Shay Drory , Tariq Toukan Subject: [PATCH net-next 01/15] net/mlx5: Distinguish VFs/SFs in the SW system image GUID for LAG grouping Date: Tue, 3 Nov 2026 19:09:55 +0200 Message-ID: <20261103171009.563034-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20261103171009.563034-1-tariqt@nvidia.com> References: <20261103171009.563034-1-tariqt@nvidia.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CF:EE_|MW4PR12MB7437:EE_ X-MS-Office365-Filtering-Correlation-Id: bc04a039-77ca-4ff9-683b-08df39cd6fe1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|23010399003|1800799024|376014|10067099003|22082099003|18002099003|56012099006|261022113327099003|11063799006|261021121427099003|261022115727099003|261021135927099003|261022075727099003|261021133027099003|261102123227099003|261021130227099003|261022105027099003|261026135527099003|261026130827099003|261028144727099003|261026121527099003|261102130727099003|261026140227099003|261021123027099003|261009223027099003; X-Microsoft-Antispam-Message-Info: LKLgiWyicL9/oOjLTJ9f6X+nQqkwO680D7LRDiVmp6zCsniBegM2cI7W3Q/rSSMrAlwnAFdjKIm/mk+eHUkwCTG3ZtuFJkl3bNon+438OEnmb3BDdEMPeq0p8vD3VpcMdS3pdkTSYMXu734786d4kHMp0oXyKpcwKaENv7yKFFhKa2wbga8+I9AiYbYfnAADOrhrKu2+6nON8NgIXQxpdEVVmF0zafRJ5h6a3stSAn/HswrvTZXtkTKorsVEK65H3h2SfU5E/ETuCGkfVm7UxIrGEGtlI9lvWd46eJC1nlEXokvousXMzy11mM15QQvUghINPrfJ17O7Bs98XLx3CJWnbE7ijTe7GURMLlG+taSmxDrID6QbiuapUQZOgF8n2CxKmSOYt8DWjCS2TIpv8zumt7uwqvV9EIVtA4TLfFI6MzYaukUJmJ/gUspJ3/O9mwpd947/JCbZfAWTmysVRQQaU8o7CEdQYeEEWGzFLlksACWCzYbdcIKa2hHspatsNYV05BBVfMDsL403HHlVvnI50/T6GOtq1idCHX3Fq4/2X26fVnhlXVy1D3NSA0+yj/4EEatusHnAiQtopXpkROYnGU0nVSwxose41DhVvoTkYg7inL2ZS8X1dzZ14prfxcH34/DvSTh/0NnwUTS4yXtW/rsnmXRh0cIrFGLvn1L369m2QopS746BW0xdGRpzOsYbP9bUXY9UvajMPpnfoA== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700016)(23010399003)(1800799024)(376014)(10067099003)(22082099003)(18002099003)(56012099006)(261022113327099003)(11063799006)(261021121427099003)(261022115727099003)(261021135927099003)(261022075727099003)(261021133027099003)(261102123227099003)(261021130227099003)(261022105027099003)(261026135527099003)(261026130827099003)(261028144727099003)(261026121527099003)(261102130727099003)(261026140227099003)(261021123027099003)(261009223027099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QAIldzfndbBIe2EkP6z2yIYTplmGjP1+HiewFS4cu5siNEOLK+VZN6tFpBKEZj7hU6sVbAMFpyHfuHtM2JAt7Gz2FXytFCHlTMCQmg0zWZRF2yXz/HKF6TiOa6Uc7LMP4w8XBjHR85j9BULwup9bq29MT8fFiGRsozyiKlGDxoZCSxZSY3vUCm5qdGCvYUG9bNuBAp4MOvDTgweRR7vU4OoCLyYxQ6sTT7ec/7wnDBxm3S8OPp7+ZASOkPQXpj5jQPKyiaX4Z6aDYvonD2bGBZt5V1yfBPtfp4wLeM7kHWvRUUvjHHP9g7fQSIeQMYH+2SDw/mng0cle/jhzzkBKhAO3I5x4OYErUKtestIcTxaSt33g9OHMpv7d/uKA2q68XwLq91JedKNGT4arWkx2RH6+SiCeM9BVMUw/sRp8CmU3+hqLTNrN5QtS/cme2hUP X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2026 17:11:01.7855 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bc04a039-77ca-4ff9-683b-08df39cd6fe1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7437 From: Shay Drory mlx5_query_nic_sw_system_image_guid() builds the key used to group devices that may form a LAG. A PF and its VFs/SFs share the same FW system image GUID, so without a discriminator a VF/SF that can join a virt LAG would be grouped with its PF. Appending bare discriminator bytes at conditional offsets is not enough: distinct capability sets can collapse to the same key (a PF ending in a load_balance byte of 0x01 vs a VF whose marker is 0x01). Give each discriminator a fixed position instead, and add the VF and SF as such fields. Trailing zero fields are trimmed, so keys of devices that set none of the new fields are unchanged. Set the VF/SF markers only when mlx5_virt_lag_is_supported(). The same key also backs mlx5_same_hw_devs(), so a VF/SF that cannot join a virt LAG keeps its current key and is still identified as the same HW as its PF. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Reviewed-by: Moshe Shemesh Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/lag/lag.h | 9 ++++ .../net/ethernet/mellanox/mlx5/core/vport.c | 41 +++++++++++++++++-- include/linux/mlx5/driver.h | 2 +- 3 files changed, 48 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h index 8552792b9035..0ff337983a6d 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h @@ -266,6 +266,15 @@ static inline void mlx5_lag_set_vports_agg_speed(struct mlx5_lag *ldev) {} static inline void mlx5_lag_reset_vports_speed(struct mlx5_lag *ldev) {} #endif +static inline bool mlx5_virt_lag_is_supported(const struct mlx5_core_dev *dev) +{ + if (!MLX5_CAP_GEN(dev, multi_uplink_eswitch) || + !MLX5_CAP_GEN(dev, lag_master) || + MLX5_CAP_GEN(dev, num_lag_ports) >= 2) + return false; + return true; +} + static inline bool mlx5_lag_is_supported(struct mlx5_core_dev *dev) { if (!MLX5_CAP_GEN(dev, vport_group_manager) || diff --git a/drivers/net/ethernet/mellanox/mlx5/core/vport.c b/drivers/net/ethernet/mellanox/mlx5/core/vport.c index 78f3d15b599d..50d2609374c4 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/vport.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/vport.c @@ -38,6 +38,7 @@ #include "mlx5_core.h" #include "eswitch.h" #include "sf/sf.h" +#include "lag/lag.h" /* Mutex to hold while enabling or disabling RoCE */ static DEFINE_MUTEX(mlx5_roce_en_lock); @@ -1308,10 +1309,37 @@ u64 mlx5_query_nic_system_image_guid(struct mlx5_core_dev *mdev) } EXPORT_SYMBOL_GPL(mlx5_query_nic_system_image_guid); +static u8 mlx5_sw_guid_load_balance(const struct mlx5_core_dev *mdev) +{ + if (MLX5_CAP_GEN_2(mdev, load_balance_id) && + MLX5_CAP_GEN_2(mdev, lag_per_mp_group)) + return MLX5_CAP_GEN_2(mdev, load_balance_id); + return 0; +} + +static u8 mlx5_sw_guid_sf(const struct mlx5_core_dev *mdev) +{ + return mlx5_core_is_sf(mdev) && mlx5_virt_lag_is_supported(mdev); +} + +static u8 mlx5_sw_guid_vf(const struct mlx5_core_dev *mdev) +{ + return mlx5_core_is_vf(mdev) && mlx5_virt_lag_is_supported(mdev); +} + +static u8 (* const mlx5_sw_guid_fields[])(const struct mlx5_core_dev *mdev) = { + mlx5_sw_guid_load_balance, + mlx5_sw_guid_vf, + mlx5_sw_guid_sf, + /* New fields should be added at the end */ +}; + void mlx5_query_nic_sw_system_image_guid(struct mlx5_core_dev *mdev, u8 *buf, u8 *len) { u64 fw_system_image_guid; + u8 trim_len; + int i; *len = 0; @@ -1321,10 +1349,17 @@ void mlx5_query_nic_sw_system_image_guid(struct mlx5_core_dev *mdev, u8 *buf, memcpy(buf, &fw_system_image_guid, sizeof(fw_system_image_guid)); *len += sizeof(fw_system_image_guid); + trim_len = *len; - if (MLX5_CAP_GEN_2(mdev, load_balance_id) && - MLX5_CAP_GEN_2(mdev, lag_per_mp_group)) - buf[(*len)++] = MLX5_CAP_GEN_2(mdev, load_balance_id); + for (i = 0; i < ARRAY_SIZE(mlx5_sw_guid_fields); i++) { + u8 val = mlx5_sw_guid_fields[i](mdev); + + buf[(*len)++] = val; + if (val) + trim_len = *len; + } + + *len = trim_len; } bool mlx5_vport_use_vhca_id_as_func_id(struct mlx5_core_dev *dev, diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h index abb99371ff13..d9d91faa0a1d 100644 --- a/include/linux/mlx5/driver.h +++ b/include/linux/mlx5/driver.h @@ -1395,7 +1395,7 @@ static inline struct net *mlx5_core_net(struct mlx5_core_dev *dev) return devlink_net(priv_to_devlink(dev)); } -#define MLX5_SW_IMAGE_GUID_MAX_BYTES 9 +#define MLX5_SW_IMAGE_GUID_MAX_BYTES 11 static inline bool mlx5_data_direct_supported(struct mlx5_core_dev *mdev) { -- 2.44.0