From: Ian Rogers <irogers@google.com>
To: linux-perf-users@vger.kernel.org,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>
Cc: linux-kernel@vger.kernel.org,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>, Jiri Olsa <jolsa@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
James Clark <james.clark@linaro.org>,
Kan Liang <kan.liang@linux.intel.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Thomas Falcon <thomas.falcon@intel.com>,
John Garry <john.garry@linux.dev>, Will Deacon <will@kernel.org>,
Leo Yan <leo.yan@arm.com>,
Athira Rajeev <atrajeev@linux.ibm.com>,
Thomas Richter <tmricht@linux.ibm.com>,
Ravi Bangoria <ravi.bangoria@amd.com>,
Sandipan Das <sandipan.das@amd.com>,
Ian Rogers <irogers@google.com>
Subject: [PATCH v1 38/41] perf pmu: Probe branch instruction skid
Date: Tue, 3 Nov 2026 15:44:54 -0800 [thread overview]
Message-ID: <20261103234502.1008382-39-irogers@google.com> (raw)
In-Reply-To: <20261103234502.1008382-1-irogers@google.com>
Extend perf_pmu__probe() with run_skid_branch_loop() and
probe_pmu_skid() to empirically measure branch instruction skid across
supported precise_ip levels (0..3) on core PMUs.
For each supported precise_ip level, open a branch sampling event on the
current thread, execute a NOP-runway loop ending in a backward
conditional branch on x86_64, arm64, and riscv, and compute the minimum,
maximum, average, and exact-IP (zero-skid) sample counts from the
recorded ring buffer samples.
Signed-off-by: Ian Rogers <irogers@google.com>
---
tools/perf/util/pmu.c | 259 ++++++++++++++++++++++++++++++++++++++++++
tools/perf/util/pmu.h | 15 +++
2 files changed, 274 insertions(+)
diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index e26563342ad1..a5adbd34c5f2 100644
--- a/tools/perf/util/pmu.c
+++ b/tools/perf/util/pmu.c
@@ -3920,6 +3920,263 @@ static void probe_mmap_caps(struct perf_pmu *pmu,
}
}
+/*
+ * Mark noinline so the compiler does not inline the multi-kilobyte .rept nop
+ * runway into callers; GCC estimates inline asm size by counting newlines in
+ * the template string and would otherwise emit short-range conditional
+ * branches (such as ARM64 tbz/tbnz with a +-32KB range) across the inlined
+ * block.
+ */
+static noinline bool run_skid_branch_loop(unsigned long iters,
+ uintptr_t *out_s_ip,
+ uintptr_t *out_b_ip,
+ uintptr_t *out_e_ip,
+ int *out_insn_sz, int *out_nop_cnt)
+{
+#if defined(__x86_64__)
+ uintptr_t s_ip, b_ip, e_ip;
+
+ asm volatile(
+ "lea 1f(%%rip), %[s_ip]\n\t"
+ "lea 2f(%%rip), %[b_ip]\n\t"
+ "lea 3f(%%rip), %[e_ip]\n\t"
+ ".balign 64\n"
+ "1:\n\t"
+ ".rept 8192\n\t"
+ "nop\n\t"
+ ".endr\n\t"
+ "dec %[cnt]\n\t"
+ "2:\n\t"
+ "jnz 1b\n"
+ "3:\n\t"
+ : [cnt] "+r" (iters),
+ [s_ip] "=&r" (s_ip),
+ [b_ip] "=&r" (b_ip),
+ [e_ip] "=&r" (e_ip)
+ :
+ : "cc", "memory"
+ );
+ *out_s_ip = s_ip;
+ *out_b_ip = b_ip;
+ *out_e_ip = e_ip;
+ *out_insn_sz = 1;
+ *out_nop_cnt = 8192;
+ return true;
+#elif defined(__aarch64__)
+ uintptr_t s_ip, b_ip, e_ip;
+
+ asm volatile(
+ "adr %[s_ip], 1f\n\t"
+ "adr %[b_ip], 2f\n\t"
+ "adr %[e_ip], 3f\n\t"
+ ".balign 64\n"
+ "1:\n\t"
+ ".rept 1024\n\t"
+ "nop\n\t"
+ ".endr\n\t"
+ "subs %[cnt], %[cnt], #1\n\t"
+ "2:\n\t"
+ "b.ne 1b\n"
+ "3:\n\t"
+ : [cnt] "+r" (iters),
+ [s_ip] "=&r" (s_ip),
+ [b_ip] "=&r" (b_ip),
+ [e_ip] "=&r" (e_ip)
+ :
+ : "cc", "memory"
+ );
+ *out_s_ip = s_ip;
+ *out_b_ip = b_ip;
+ *out_e_ip = e_ip;
+ *out_insn_sz = 4;
+ *out_nop_cnt = 1024;
+ return true;
+#elif defined(__riscv)
+ uintptr_t s_ip, b_ip, e_ip;
+
+ asm volatile(
+ ".option push\n\t"
+ ".option norvc\n\t"
+ "la %[s_ip], 1f\n\t"
+ "la %[b_ip], 2f\n\t"
+ "la %[e_ip], 3f\n\t"
+ ".balign 64\n"
+ "1:\n\t"
+ ".rept 512\n\t"
+ "nop\n\t"
+ ".endr\n\t"
+ "addi %[cnt], %[cnt], -1\n\t"
+ "2:\n\t"
+ "bnez %[cnt], 1b\n"
+ "3:\n\t"
+ ".option pop\n\t"
+ : [cnt] "+r" (iters),
+ [s_ip] "=&r" (s_ip),
+ [b_ip] "=&r" (b_ip),
+ [e_ip] "=&r" (e_ip)
+ :
+ : "memory"
+ );
+ *out_s_ip = s_ip;
+ *out_b_ip = b_ip;
+ *out_e_ip = e_ip;
+ *out_insn_sz = 4;
+ *out_nop_cnt = 512;
+ return true;
+#else
+ (void)iters;
+ *out_s_ip = 0;
+ *out_b_ip = 0;
+ *out_e_ip = 0;
+ *out_insn_sz = 0;
+ *out_nop_cnt = 0;
+ return false;
+#endif
+}
+
+/*
+ * Measure branch instruction skid across supported precise_ip levels (0..3)
+ * by sampling a tight NOP-runway branch loop and inspecting sample IPs.
+ */
+static void probe_pmu_skid(struct perf_pmu *pmu,
+ const struct perf_event_attr *base_attr,
+ unsigned long flags)
+{
+ struct perf_event_attr br_attr;
+ char br_buf[256];
+ long page_sz = sysconf(_SC_PAGESIZE);
+ size_t data_sz, mmap_sz;
+
+ if (!pmu->is_core || !pmu->probed.can_sample)
+ return;
+
+ if (page_sz <= 0)
+ page_sz = 4096;
+ data_sz = 4 * (size_t)page_sz;
+ mmap_sz = (size_t)page_sz + data_sz;
+
+ memset(&br_attr, 0, sizeof(br_attr));
+ snprintf(br_buf, sizeof(br_buf), "%s/branches/", pmu->name);
+ if (!parse_candidate_attr(br_buf, &br_attr)) {
+ br_attr.type = PERF_TYPE_HARDWARE;
+ br_attr.size = base_attr->size;
+ br_attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
+ if (perf_pmus__host_supports_extended_type())
+ br_attr.config |= (__u64)pmu->type << PERF_PMU_TYPE_SHIFT;
+ }
+ br_attr.exclude_user = base_attr->exclude_user;
+ br_attr.exclude_kernel = 1;
+ br_attr.exclude_hv = 1;
+ br_attr.exclude_idle = base_attr->exclude_idle;
+ br_attr.exclude_host = base_attr->exclude_host;
+ br_attr.exclude_guest = base_attr->exclude_guest;
+
+ for (int lvl = 0; lvl <= 3; lvl++) {
+ struct perf_event_attr attr = br_attr;
+ struct perf_event_mmap_page *pc;
+ uintptr_t s_ip = 0, b_ip = 0, e_ip = 0;
+ int insn_sz = 0, nop_cnt = 0;
+ void *ring;
+ u8 *data;
+ u64 head, tail = 0;
+ int samples = 0, exact = 0;
+ int min_skid = 999999, max_skid = 0;
+ long sum_skid = 0;
+ int fd;
+
+ if (lvl > 0 && !(pmu->probed.precise_mask & (1u << lvl)))
+ continue;
+
+ attr.disabled = 1;
+ attr.sample_period = 251;
+ attr.sample_type = PERF_SAMPLE_IP;
+ attr.precise_ip = lvl;
+
+ fd = sys_perf_event_open(&attr, 0, -1, -1, flags);
+ if (fd < 0 && lvl > 0 && attr.exclude_kernel && attr.config2 == 0) {
+ attr.config2 = 1;
+ fd = sys_perf_event_open(&attr, 0, -1, -1, flags);
+ }
+ if (fd < 0)
+ continue;
+
+ ring = mmap(NULL, mmap_sz, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
+ if (ring == MAP_FAILED) {
+ close(fd);
+ continue;
+ }
+
+ ioctl(fd, PERF_EVENT_IOC_RESET, 0);
+ ioctl(fd, PERF_EVENT_IOC_ENABLE, 0);
+ if (!run_skid_branch_loop(8000, &s_ip, &b_ip, &e_ip,
+ &insn_sz, &nop_cnt)) {
+ ioctl(fd, PERF_EVENT_IOC_DISABLE, 0);
+ munmap(ring, mmap_sz);
+ close(fd);
+ break;
+ }
+ ioctl(fd, PERF_EVENT_IOC_DISABLE, 0);
+
+ pc = ring;
+ head = READ_ONCE(pc->data_head);
+ /* Ensure data_head is read before reading ring buffer contents. */
+ rmb();
+ if (head > data_sz)
+ head = data_sz;
+ data = (u8 *)ring + page_sz;
+
+ while (tail + sizeof(struct perf_event_header) <= head) {
+ struct perf_event_header *hdr =
+ (struct perf_event_header *)(data + tail);
+
+ if (hdr->size == 0 || tail + hdr->size > head)
+ break;
+ if (hdr->type == PERF_RECORD_SAMPLE &&
+ hdr->size >= sizeof(*hdr) + sizeof(u64)) {
+ u64 ip = *(u64 *)((u8 *)hdr + sizeof(*hdr));
+ uintptr_t uip = (uintptr_t)ip;
+
+ if (uip >= s_ip && uip <= e_ip && insn_sz > 0) {
+ int skid;
+
+ if (uip == b_ip) {
+ skid = 0;
+ } else if (uip >= s_ip && uip < b_ip) {
+ long off = (long)(uip - s_ip) / insn_sz;
+
+ skid = (off < nop_cnt) ?
+ (int)(off + 1) : (nop_cnt + 1);
+ } else {
+ skid = 1;
+ }
+
+ samples++;
+ if (hdr->misc & PERF_RECORD_MISC_EXACT_IP)
+ exact++;
+ if (skid < min_skid)
+ min_skid = skid;
+ if (skid > max_skid)
+ max_skid = skid;
+ sum_skid += skid;
+ }
+ }
+ tail += hdr->size;
+ }
+
+ if (samples > 0) {
+ pmu->probed.skid[lvl].measured = true;
+ pmu->probed.skid[lvl].samples = samples;
+ pmu->probed.skid[lvl].exact_samples = exact;
+ pmu->probed.skid[lvl].min_skid = min_skid;
+ pmu->probed.skid[lvl].max_skid = max_skid;
+ pmu->probed.skid[lvl].avg_skid = (double)sum_skid / samples;
+ }
+
+ munmap(ring, mmap_sz);
+ close(fd);
+ }
+}
+
static void __perf_pmu__probe(struct perf_pmu *pmu, int pmu_cpu)
{
struct probe_candidates cands = { .nr = 0 };
@@ -4256,6 +4513,8 @@ static void __perf_pmu__probe(struct perf_pmu *pmu, int pmu_cpu)
}
}
}
+
+ probe_pmu_skid(pmu, &base_attr, flags);
}
/* 3b. User and interrupt register sampling masks */
diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h
index bb21e910da90..4bdb8daf7a5a 100644
--- a/tools/perf/util/pmu.h
+++ b/tools/perf/util/pmu.h
@@ -381,6 +381,21 @@ struct perf_pmu {
* can only be sampled with precise sampling.
*/
u64 intr_pred_precise_mask;
+ /** @probed.skid: Measured branch instruction skid at precise_ip levels (0..3). */
+ struct {
+ /** @probed.skid.measured: Was skid measured at this precise_ip level? */
+ bool measured;
+ /** @probed.skid.samples: Number of branch samples collected. */
+ int samples;
+ /** @probed.skid.exact_samples: Samples with zero skid from target IP. */
+ int exact_samples;
+ /** @probed.skid.min_skid: Minimum instruction skid observed. */
+ int min_skid;
+ /** @probed.skid.max_skid: Maximum instruction skid observed. */
+ int max_skid;
+ /** @probed.skid.avg_skid: Average instruction skid across samples. */
+ double avg_skid;
+ } skid[4];
} probed;
};
--
2.56.0.385.gac671c819a-goog
next prev parent reply other threads:[~2026-11-03 23:46 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 23:44 [PATCH v1 00/41] perf: Per-env PMUs, recorded event metrics, and perf sysinfo Ian Rogers
2026-11-03 23:44 ` [PATCH v1 01/41] perf env: Make lazy perf_env initialization thread-safe Ian Rogers
2026-11-03 23:44 ` [PATCH v1 02/41] perf env: Add host_env() singleton Ian Rogers
2026-11-03 23:44 ` [PATCH v1 03/41] perf pmu: Add from_env parameter to perf_pmu__init() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 04/41] perf pmus: Introduce struct perf_pmus and perf_env__pmus() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 05/41] perf pmus: Pass struct perf_pmus to find helpers Ian Rogers
2026-11-03 23:44 ` [PATCH v1 06/41] perf pmus: Pass struct perf_pmus to scan helpers Ian Rogers
2026-11-03 23:44 ` [PATCH v1 07/41] perf pmu-events: Add e_machine to struct pmu_events_map Ian Rogers
2026-11-03 23:44 ` [PATCH v1 08/41] perf pmu-events: Pass e_machine to find_core_*_table() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 09/41] perf header: Pass e_machine to strcmp_cpuid_str() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 10/41] perf header: Support CPUID matching across all architectures Ian Rogers
2026-11-03 23:44 ` [PATCH v1 11/41] perf test: Make the CPUID matching test architecture independent Ian Rogers
2026-11-03 23:44 ` [PATCH v1 12/41] perf test: Add CPUID matching tests for other architectures Ian Rogers
2026-11-03 23:44 ` [PATCH v1 13/41] perf pmus: Add perf_pmus__read_from_env() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 14/41] perf metricgroup: Pass struct perf_pmus to metricgroup__for_each_metric() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 15/41] perf metricgroup: Move matching of metrics to recorded events from perf script Ian Rogers
2026-11-03 23:44 ` [PATCH v1 16/41] perf parse-events: Decode metric-id terms when adding events Ian Rogers
2026-11-03 23:44 ` [PATCH v1 17/41] perf evsel: Generalize metric_id to a set of metric_ids Ian Rogers
2026-11-03 23:44 ` [PATCH v1 18/41] perf pmu: Add perf_pmu__for_each_name_from_config() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 19/41] perf metricgroup: Improve matching of metrics to recorded events Ian Rogers
2026-11-03 23:44 ` [PATCH v1 20/41] perf metricgroup: Add metricgroup__add_recorded_metrics() Ian Rogers
2026-11-03 23:44 ` [PATCH v1 21/41] perf script: Fix metrics computed from samples Ian Rogers
2026-11-03 23:44 ` [PATCH v1 22/41] perf script: Don't drop metric samples for CPUs missing from the evsel Ian Rogers
2026-11-03 23:44 ` [PATCH v1 23/41] perf stat report: Display metrics for recorded events Ian Rogers
2026-11-03 23:44 ` [PATCH v1 24/41] perf script: Display metrics for perf stat record data Ian Rogers
2026-11-03 23:44 ` [PATCH v1 25/41] perf test: Add stat record metrics test Ian Rogers
2026-11-03 23:44 ` [PATCH v1 26/41] perf pmus: Expose duplicate uncore PMU scanning helpers Ian Rogers
2026-11-03 23:44 ` [PATCH v1 27/41] perf mem-events: Expose PMU init and name formatting helpers Ian Rogers
2026-11-03 23:44 ` [PATCH v1 28/41] perf pmu: Add perf_pmu__probe() for basic open, counting, and sampling Ian Rogers
2026-11-03 23:44 ` [PATCH v1 29/41] perf pmu: Probe supported sample_type flags Ian Rogers
2026-11-03 23:44 ` [PATCH v1 30/41] perf pmu: Probe precise_ip levels Ian Rogers
2026-11-03 23:44 ` [PATCH v1 31/41] perf pmu: Probe privilege exclusion modifiers Ian Rogers
2026-11-03 23:44 ` [PATCH v1 32/41] perf pmu: Probe execution and AUX area features Ian Rogers
2026-11-03 23:44 ` [PATCH v1 33/41] perf pmu: Probe event group size limits Ian Rogers
2026-11-03 23:44 ` [PATCH v1 34/41] perf pmu: Probe user and interrupt sample register masks Ian Rogers
2026-11-03 23:44 ` [PATCH v1 35/41] perf pmu: Probe interrupt registers that require precise sampling Ian Rogers
2026-11-03 23:44 ` [PATCH v1 36/41] perf pmu: Probe memory profiling events and sample formats Ian Rogers
2026-11-03 23:44 ` [PATCH v1 37/41] perf pmu: Probe user-space mmap capabilities Ian Rogers
2026-11-03 23:44 ` Ian Rogers [this message]
2026-11-03 23:44 ` [PATCH v1 39/41] perf sysinfo: Add sysinfo subcommand Ian Rogers
2026-11-03 23:44 ` [PATCH v1 40/41] perf docs: Add perf-sysinfo man page Ian Rogers
2026-11-03 23:44 ` [PATCH v1 41/41] perf test: Add perf sysinfo shell test Ian Rogers
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