From: Sascha Bischoff <sascha.bischoff@arm.com>
To: Marc Zyngier <maz@kernel.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Thomas Gleixner <tglx@kernel.org>, Radu Rendec <radu@rendec.net>,
Timothy Hayes <timothy.hayes@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Jonathan Cameron <jic23@kernel.org>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Sascha Bischoff <sascha.bischoff@arm.com>,
stable@vger.kernel.org
Subject: [PATCH v2 06/10] irqchip/gic-v5: Honour ACPI ITS noncoherent flag
Date: Wed, 04 Nov 2026 17:48:00 +0000 [thread overview]
Message-ID: <20261104-host_gicv5_fixes-v2-6-e47ad20ea3c8@arm.com> (raw)
In-Reply-To: <20261104-host_gicv5_fixes-v2-0-e47ad20ea3c8@arm.com>
The ACPI ITS probe passes its noncoherent flag to
gicv5_its_init_bases(), but the common initializer checks a DT
property instead. For an ACPI ITS, this always selects coherent cache
settings and skips the cache maintenance required for its tables.
Use the noncoherent argument, which both firmware paths already
supply.
Fixes: a97efa5ba5946 ("irqchip/gic-v5: Add ACPI ITS probing")
Cc: stable@vger.kernel.org
Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
---
drivers/irqchip/irq-gic-v5-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v5-its.c b/drivers/irqchip/irq-gic-v5-its.c
index 866c238f08dfe..c5d057f713134 100644
--- a/drivers/irqchip/irq-gic-v5-its.c
+++ b/drivers/irqchip/irq-gic-v5-its.c
@@ -1135,7 +1135,7 @@ static int __init gicv5_its_init_bases(void __iomem *its_base, struct fwnode_han
goto out_free_node;
}
- if (of_property_read_bool(np, "dma-noncoherent")) {
+ if (noncoherent) {
/*
* A non-coherent ITS implies that some cache levels cannot be
* used coherently by the cores and GIC. Our only option is to mark
--
2.34.1
next prev parent reply other threads:[~2026-11-04 17:48 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 17:47 [PATCH v2 00/10] irqchip/gic-v5: Fix misc IRS and ITS host driver issues Sascha Bischoff
2026-11-04 17:47 ` [PATCH v2 01/10] irqchip/gic-v5: Reject SPIs not backed by an IRS Sascha Bischoff
2026-11-04 17:47 ` [PATCH v2 02/10] irqchip/gic-v5: Only set IRS DPS when 1ofN routing is supported Sascha Bischoff
2026-11-04 17:47 ` [PATCH v2 03/10] irqchip/gic-v5: Serialise IRS synchronisation requests Sascha Bischoff
2026-11-04 17:47 ` [PATCH v2 04/10] irqchip/gic-v5: Serialise ITS invalidation commands Sascha Bischoff
2026-11-04 17:47 ` [PATCH v2 05/10] irqchip/gic-v5: Use linear DT and ITT when L2 covers all IDs Sascha Bischoff
2026-11-04 17:48 ` Sascha Bischoff [this message]
2026-11-04 17:48 ` [PATCH v2 07/10] irqchip/gic-v5: Use firmware node name in ITS warning Sascha Bischoff
2026-11-04 17:48 ` [PATCH v2 08/10] irqchip/gic-v5: Invalidate ITS device cache before freeing ITT Sascha Bischoff
2026-11-04 17:48 ` [PATCH v2 09/10] irqchip/gic-v5: Clean the allocated linear device table size Sascha Bischoff
2026-11-04 17:48 ` [PATCH v2 10/10] irqchip/gic-v5: Release ITS MMIO region on DT probe failure Sascha Bischoff
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