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From: Jonathan Cameron <jic23@kernel.org>
To: Rodrigo Alencar via B4 Relay
	<devnull+rodrigo.alencar.analog.com@kernel.org>
Cc: rodrigo.alencar@analog.com, linux-iio@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux@analog.com,
	devicetree@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-doc@vger.kernel.org,
	"Olivier Moysan" <olivier.moysan@foss.st.com>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"David Lechner" <dlechner@baylibre.com>,
	"Andy Shevchenko" <andy@kernel.org>,
	"Michael Hennerich" <Michael.Hennerich@analog.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Shuah Khan" <skhan@linuxfoundation.org>,
	"Randy Dunlap" <rdunlap@infradead.org>
Subject: Re: [PATCH v3 06/10] iio: frequency: ad9910: add axi backend driver
Date: Wed, 4 Nov 2026 00:09:06 +0000	[thread overview]
Message-ID: <20261104000906.61b07c44@jic23-hlaptop> (raw)
In-Reply-To: <20261103-ad9910-backend-support-v3-6-0e9224ddf7b7@analog.com>

On Tue, 03 Nov 2026 11:53:02 -0300
Rodrigo Alencar via B4 Relay <devnull+rodrigo.alencar.analog.com@kernel.org> wrote:

> From: Rodrigo Alencar <rodrigo.alencar@analog.com>
> 
> Add the driver for the AD9910 AXI backend IP core, which interfaces with
> the data and control pins of the AD9910 DDS. It registers as an IIO
> backend that provides:
> 
> - a DMA output buffer that streams data into the parallel data port;
> - the parallel data destination (F[1:0] pins) and data rate, derived
>   from the PDCLK frequency;
> - the PROFILE[2:0] pins control, through profile channel enables.
> 
> It also registers a PWM chip with a single output driving the DRCTL
> pin, which the AD9910 driver uses to control the digital ramp generator
> direction. The PWM implements the waveform callbacks, with period, duty
> length and duty offset programmed in SYNC_CLK cycles. The duty offset
> is realized by a delay applied once, before DRCTL starts toggling. The
> waveform is reprogrammed when the SYNC_CLK rate changes, so that the PWM
> output keeps its timing.
> 
> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com>
Really trivial stuff that I might have ignored, but given it looks like
you'll be doing a v4 might as well tidy up.

Thanks,

Jonathan

> diff --git a/drivers/iio/frequency/ad9910-axi-backend.c b/drivers/iio/frequency/ad9910-axi-backend.c
> new file mode 100644
> index 000000000000..db99fa9f2dda
> --- /dev/null
> +++ b/drivers/iio/frequency/ad9910-axi-backend.c
> @@ -0,0 +1,551 @@

> +
> +static void ad9910_axi_drctl_fromhw(struct ad9910_axi_state *st,
> +				    const struct ad9910_axi_drctl_wfhw *wfhw,
> +				    struct pwm_waveform *wf)
> +{
> +	if (!wfhw->period) {

Maybe a comment on why this one matters, not the width or delay.
If it's a case of all or none, just add a comment on that.

> +		*wf = (struct pwm_waveform){ };
> +		return;
> +	}
> +
> +	wf->period_length_ns = ad9910_axi_cycles_to_ns(st, wfhw->period);
> +	wf->duty_length_ns = ad9910_axi_cycles_to_ns(st, wfhw->width);
> +	wf->duty_offset_ns = ad9910_axi_cycles_to_ns(st, wfhw->delay);
> +}



> +static int ad9910_axi_pwm_read_waveform(struct pwm_chip *chip,
> +					struct pwm_device *pwm, void *_wfhw)
> +{
> +	struct ad9910_axi_state *st = pwmchip_get_drvdata(chip);
> +	struct ad9910_axi_drctl_wfhw *wfhw = _wfhw;
> +	u32 drg;
> +	int ret;
> +
> +	guard(mutex)(&st->lock);
> +
> +	ret = regmap_read(st->regmap, AD9910_AXI_REG_DRG, &drg);
> +	if (ret)
> +		return ret;
> +
> +	if (!FIELD_GET(AD9910_AXI_REG_DRG_TOGGLE_EN_MSK, drg)) {
> +		*wfhw = (struct ad9910_axi_drctl_wfhw){ };

Given I had to go look to check if you were initializing all fields
in the other paths, maybe just do this zeroing at top of this function?

Doesn't matter much.

> +		return 0;
> +	}
> +
> +	ret = regmap_read(st->regmap, AD9910_AXI_REG_DRCTL_PERIOD, &wfhw->period);
> +	if (ret)
> +		return ret;
> +
> +	ret = regmap_read(st->regmap, AD9910_AXI_REG_DRCTL_WIDTH, &wfhw->width);
> +	if (ret)
> +		return ret;
> +
> +	return regmap_read(st->regmap, AD9910_AXI_REG_DRCTL_DELAY, &wfhw->delay);
> +}

> +
> +static int ad9910_axi_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct ad9910_axi_state *st;
> +	struct pwm_chip *chip;
> +	void __iomem *base;
> +	struct clk *clk;
> +	int ret;
> +
> +	chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*st));

Use local variable dev given you have it.

> +	if (IS_ERR(chip))
> +		return PTR_ERR(chip);
> +
> +	st = pwmchip_get_drvdata(chip);
> +
> +	base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(base))
> +		return PTR_ERR(base);
> +
> +	clk = devm_clk_get_enabled(dev, NULL);
> +	if (IS_ERR(clk))
> +		return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
> +
> +	st->dev = dev;
> +	st->regmap = devm_regmap_init_mmio(dev, base,
> +					   &ad9910_axi_regmap_config);
> +	if (IS_ERR(st->regmap))
> +		return dev_err_probe(dev, PTR_ERR(st->regmap),
> +				     "failed to init register map\n");
> +
> +	ret = devm_mutex_init(dev, &st->lock);
> +	if (ret)
> +		return ret;
> +
> +	ret = ad9910_axi_setup(st);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "failed to setup device\n");
> +
> +	chip->ops = &ad9910_axi_pwm_ops;
> +
> +	ret = devm_pwmchip_add(dev, chip);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "Could not register PWM chip\n");
> +
> +	return devm_iio_backend_register(dev, &ad9910_axi_back_info, st);
> +}



  reply	other threads:[~2026-11-04  0:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03 14:52 [PATCH v3 00/10] iio: frequency: ad9910: add IIO backend support Rodrigo Alencar via B4 Relay
2026-11-03 14:52 ` [PATCH v3 01/10] iio: frequency: ad9910: powerdown fix Rodrigo Alencar via B4 Relay
2026-11-04  0:20   ` Jonathan Cameron
2026-11-03 14:52 ` [PATCH v3 02/10] iio: backend: add devm_iio_backend_get_optional() Rodrigo Alencar via B4 Relay
2026-11-03 14:52 ` [PATCH v3 03/10] dt-bindings: iio: frequency: add adi,ad9910-axi-backend Rodrigo Alencar via B4 Relay
2026-11-03 14:53 ` [PATCH v3 04/10] dt-bindings: iio: frequency: ad9910: add io-backends property Rodrigo Alencar via B4 Relay
2026-11-03 14:53 ` [PATCH v3 05/10] iio: frequency: ad9910: move channel indexes into a shared header Rodrigo Alencar via B4 Relay
2026-11-03 14:53 ` [PATCH v3 06/10] iio: frequency: ad9910: add axi backend driver Rodrigo Alencar via B4 Relay
2026-11-04  0:09   ` Jonathan Cameron [this message]
2026-11-03 14:53 ` [PATCH v3 07/10] iio: frequency: ad9910: support drctl control Rodrigo Alencar via B4 Relay
2026-11-03 16:47   ` Andy Shevchenko
2026-11-04  0:15   ` Jonathan Cameron
2026-11-03 14:53 ` [PATCH v3 08/10] iio: frequency: ad9910: support iio backend Rodrigo Alencar via B4 Relay
2026-11-03 16:52   ` Andy Shevchenko
2026-11-03 14:53 ` [PATCH v3 09/10] iio: ABI: add integration_time for output channels Rodrigo Alencar via B4 Relay
2026-11-03 14:53 ` [PATCH v3 10/10] docs: iio: ad9910: document DRCTL pin control Rodrigo Alencar via B4 Relay

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