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Tue, 03 Nov 2026 16:43:41 -0800 (PST) Received: from zippy.localdomain ([73.62.185.64]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4acea61f0c0sm513493fac.14.2026.11.03.16.43.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2026 16:43:41 -0800 (PST) From: Alex Elder To: sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com, p.zabel@pengutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: daniel@riscstar.com, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, fabrice.gasnier@foss.st.com, alexandre.torgue@foss.st.com, marex@nabladev.com, changhuang.liang@starfivetech.com, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] reset: toshiba: introduce a TC9564 SoC reset driver Date: Tue, 3 Nov 2026 18:43:31 -0600 Message-ID: <20261104004332.2141282-5-elder@riscstar.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261104004332.2141282-1-elder@riscstar.com> References: <20261104004332.2141282-1-elder@riscstar.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Define a new platform driver that manages reset signals implemented by the Toshiba TC9564 SoC. There are 13 reset signals available, but currently only the resets that are (or will soon be) used are defined to be controllable. Two registers manage the state of the resets. The registers are accessed via a regmap supplied by a system controller. Access to the memory region is provided via a BAR on a PCIe endpoint function embedded in the TC9564 SoC. Co-developed-by: Daniel Thompson Signed-off-by: Daniel Thompson Signed-off-by: Alex Elder --- MAINTAINERS | 7 ++ drivers/reset/Kconfig | 12 ++++ drivers/reset/Makefile | 1 + drivers/reset/reset-tc9564.c | 135 +++++++++++++++++++++++++++++++++++ 4 files changed, 155 insertions(+) create mode 100644 drivers/reset/reset-tc9564.c diff --git a/MAINTAINERS b/MAINTAINERS index ee01aed56508d..8389b11fe6e1a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -28355,6 +28355,13 @@ F: Documentation/devicetree/bindings/soc/toshiba/toshiba,tc9564-config-syscon.ya F: drivers/soc/toshiba/tc9564-syscon.c F: include/dt-bindings/soc/toshiba,tc9564.h +TOSHIBA TC9564 RESET DRIVER +M: Lorenzo Bianconi +M: Alex Elder +M: Daniel Thompson +S: Maintained +F: drivers/reset/reset-tc9564.c + TOSHIBA WMI HOTKEYS DRIVER M: Azael Avalos L: platform-driver-x86@vger.kernel.org diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index eda9c698a95f3..8c1b08f4eebe6 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -358,6 +358,18 @@ config RESET_SUNXI help This enables the reset driver for Allwinner SoCs. +config RESET_TC9564 + tristate "Toshiba TC9564 reset support" + depends on SOC_TOSHIBA_TC9564_SYSCON + select MFD_SYSCON + default SOC_TOSHIBA_TC9564_SYSCON + help + This enables support for the reset controller embedded in the + Toshiba TC9564 SoC. The state of reset lines is controlled + via MMIO to a region managed by a system controller; this + ensures access to the region is coordinated between this and + the clock and XGMAC (stmmac) drivers. + config RESET_TENSTORRENT_ATLANTIS tristate "Tenstorrent atlantis reset driver" depends on ARCH_TENSTORRENT || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 489fafd6bbe3f..6ddded26309ef 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -45,6 +45,7 @@ obj-$(CONFIG_RESET_SKY1_AUDSS) += reset-sky1-audss.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o +obj-$(CONFIG_RESET_TC9564) += reset-tc9564.o obj-$(CONFIG_RESET_TENSTORRENT_ATLANTIS) += reset-tenstorrent-atlantis.o obj-$(CONFIG_RESET_TH1520) += reset-th1520.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o diff --git a/drivers/reset/reset-tc9564.c b/drivers/reset/reset-tc9564.c new file mode 100644 index 0000000000000..fcd58d5f1962f --- /dev/null +++ b/drivers/reset/reset-tc9564.c @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/* + * Copyright (C) 2026 by RISCstar Solutions Corporation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include + +#include + +#define RST_CTRL0_OFFSET 0x1008 +#define RST_CTRL1_OFFSET 0x1010 + +struct tc9564_reset { + u32 offset; /* RST_CTRL0_OFFSET/RST_CTRL1_OFFSET */ + u32 mask; +}; + +#define RESET_INIT0(_name, _bit) __RESET_INIT(_name, 0, _bit) +#define RESET_INIT1(_name, _bit) __RESET_INIT(_name, 1, _bit) +#define __RESET_INIT(_name, _reg, _bit) \ + [RESET_##_name] = { \ + .offset = RST_CTRL ## _reg ## _OFFSET, \ + .mask = BIT(_bit), \ + } + +static const struct tc9564_reset tc9564_reset[] = { + RESET_INIT0(MSIGEN, 18), + + RESET_INIT0(MAC0_MAC, 7), + RESET_INIT0(MAC0_PMA, 30), + RESET_INIT0(MAC0_XPCS, 31), + + RESET_INIT1(MAC1_MAC, 7), + RESET_INIT1(MAC1_PMA, 30), + RESET_INIT1(MAC1_XPCS, 31), +}; +#define RESET_COUNT ARRAY_SIZE(tc9564_reset) + +static void reset_manage(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + const struct tc9564_reset *reset = &tc9564_reset[id]; + struct regmap *regmap = dev_get_drvdata(rcdev->dev); + u32 mask = reset->mask; + + regmap_update_bits(regmap, reset->offset, mask, assert ? mask : 0); +} + +static int reset_assert(struct reset_controller_dev *rcdev, unsigned long id) +{ + reset_manage(rcdev, id, true); + + return 0; +} + +static int reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) +{ + reset_manage(rcdev, id, false); + + return 0; +} + +static int reset_status(struct reset_controller_dev *rcdev, unsigned long id) +{ + const struct tc9564_reset *reset = &tc9564_reset[id]; + struct regmap *regmap = dev_get_drvdata(rcdev->dev); + u32 val; + + regmap_read(regmap, reset->offset, &val); + + return val & reset->mask ? 1 : 0; +} + +static const struct reset_control_ops reset_control_ops = { + .assert = reset_assert, + .deassert = reset_deassert, + .status = reset_status, +}; + +static int tc9564_reset_probe(struct platform_device *pdev) +{ + struct reset_controller_dev *rcdev; + struct device *dev = &pdev->dev; + struct device_node *parent_np; + struct regmap *regmap; + int ret; + + parent_np = dev_of_node(dev->parent); + if (!parent_np) + return dev_err_probe(dev, -EINVAL, "no devicetree node\n"); + + /* Note: MMIO regmap (no error checking needed when used) */ + regmap = device_node_to_regmap(parent_np); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "failed to get config regmap\n"); + + rcdev = devm_kzalloc_obj(dev, *rcdev); + if (!rcdev) + return -ENOMEM; + + rcdev->ops = &reset_control_ops; + rcdev->owner = THIS_MODULE; + rcdev->dev = dev; + rcdev->of_node = parent_np; + rcdev->nr_resets = RESET_COUNT; + + dev_set_drvdata(dev, regmap); + + ret = devm_reset_controller_register(dev, rcdev); + if (ret) + return dev_err_probe(dev, ret, + "failed to register reset controller\n"); + + return 0; +} + +static struct platform_driver tc9564_reset_driver = { + .probe = tc9564_reset_probe, + .driver = { + .name = "toshiba-tc9564-reset", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, +}; +module_platform_driver(tc9564_reset_driver); + +MODULE_DESCRIPTION("Toshiba TC9564 Reset Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:toshiba-tc9564-reset"); -- 2.53.0