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Tue, 03 Nov 2026 23:21:22 -0800 (PST) Received: from freddie-kane.lan ([71.212.222.246]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ed0906c514sm3950345ad.29.2026.11.03.23.21.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2026 23:21:22 -0800 (PST) From: Burke Cates To: robin.clark@oss.qualcomm.com, Dmitry Baryshkov Cc: Abhinav Kumar , Dmitry Baryshkov , Yongxing Mou , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Xilin Wu , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, regressions@lists.linux.dev Subject: [PATCH] drm/msm/dp: skip the link teardown after a failed enable Date: Tue, 3 Nov 2026 23:20:48 -0800 Message-ID: <20261104072048.3486286-1-burke.cates@gmail.com> X-Mailer: git-send-email 2.54.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Commit 1bda647ce61b ("drm/msm/dp: move link-level teardown from display_disable to display_unprepare") moved msm_dp_ctrl_off_link() and the PHY exit into msm_dp_display_unprepare(). Unlike msm_dp_display_disable(), that function does not check power_on. When link training fails, msm_dp_ctrl_on_link() has already turned the link clocks and the PHY off, and .atomic_enable() returns with power_on still false. The next disable now runs msm_dp_ctrl_off_link() anyway, which writes REG_DP_MAINLINK_CTRL and pulses DP_SW_RESET with the link clocks off. On an ASUS Zenbook A16 (Glymur, eDP) the SoC then resets. Skip the link teardown when power_on is false, as before that commit, but still drop the runtime PM reference. Tested on the A16 by forcing link training to fail and then blanking the display: the SoC reset 2/2 times without this patch and 0/3 with it. Fixes: 1bda647ce61b ("drm/msm/dp: move link-level teardown from display_disable to display_unprepare") Signed-off-by: Burke Cates --- Notes: Test base: v7.4-rc1 with out-of-tree Glymur platform, board and eDP PHY patches; drivers/gpu/drm/msm/dp as in v7.4-rc1 plus a local knob that fails every training attempt. The reset is silent (no pstore), so which of the two accesses triggers it is not known. As before 1bda647ce61b, a failure after successful training still leaves the link up. Xilin Wu's hdr10 v2 09/20 handles these paths more generally; this is the minimal fix for -rc. Happy to test his approach instead. https://lore.kernel.org/all/20261009-msm-dp-hdr10-v2-9-1835d4966da3@radxa.com/ The bug was found and this patch drafted with an AI coding assistant (Claude Code, Claude Opus 5.5); I reviewed it and ran the tests. drivers/gpu/drm/msm/dp/dp_display.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 9299ce616fdb..76784cc45228 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1528,6 +1528,14 @@ static void msm_dp_display_unprepare(struct msm_dp_display_private *dp) { struct msm_dp *msm_dp_display = &dp->msm_dp_display; + /* + * Failed link training leaves the link clocks off. Avoid accessing + * link registers after a failed enable, but still release the + * runtime-PM reference below. + */ + if (!msm_dp_display->power_on) + goto out; + /* dongle is still connected but sinks are disconnected */ if (dp->link->sink_count == 0) msm_dp_link_psm_config(dp->link, &dp->panel->link_info, true); @@ -1542,6 +1550,7 @@ static void msm_dp_display_unprepare(struct msm_dp_display_private *dp) msm_dp_display->power_on = false; +out: pm_runtime_put_sync(&msm_dp_display->pdev->dev); drm_dbg_dp(dp->drm_dev, "type=%d Done\n", msm_dp_display->connector_type); base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4 -- 2.54.0