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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Clark Wang Subject: [PATCH net-next 4/4] ptp: netc: use 133MHz as the default reference clock rate for i.MX952 Date: Wed, 4 Nov 2026 17:22:17 +0800 Message-ID: <20261104092217.1730351-5-xiaoning.wang@oss.nxp.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261104092217.1730351-1-xiaoning.wang@oss.nxp.com> References: <20261104092217.1730351-1-xiaoning.wang@oss.nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SEWP216CA0068.KORP216.PROD.OUTLOOK.COM (2603:1096:101:2ba::7) To BR2PPF9D47B45B4.eurprd04.prod.outlook.com (2603:10a6:2d0::cd) X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BR2PPF9D47B45B4:EE_|AS8PR04MB7494:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d303bc6-9c2e-44ef-1612-08df3a55cf71 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|19092799006|23010399003|7416014|376014|366016|1800799024|261021121427099003|261021123027099003|261009223027099003|11063799006|10067099003|56012099006|22082099003|18002099003|261102123227099003; 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However, the NETC system clock of i.MX952 (NETC v4.6) is 133MHz. Therefore, use 133MHz as the default reference clock rate for i.MX952. Signed-off-by: Clark Wang --- drivers/ptp/ptp_netc.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/ptp/ptp_netc.c b/drivers/ptp/ptp_netc.c index 19ca99d80e95..e2f7dd8595f1 100644 --- a/drivers/ptp/ptp_netc.c +++ b/drivers/ptp/ptp_netc.c @@ -72,6 +72,7 @@ #define NETC_GLOBAL_IPBRR0 0xbf8 #define IPBRR0_IP_REV GENMASK(15, 0) #define NETC_REV_4_1 0x0401 +#define NETC_REV_4_6 0x0406 #define NETC_TMR_FIPER_NUM 3 #define NETC_TMR_INVALID_CHANNEL NETC_TMR_FIPER_NUM @@ -88,6 +89,7 @@ #define NETC_TMR_EXT_OSC 2 /* tmr_1588_clk, from IO pins */ #define NETC_TMR_SYSCLK_333M 333333333U +#define NETC_TMR_SYSCLK_133M 133333333U enum netc_pp_type { NETC_PP_PPS = 1, @@ -858,7 +860,10 @@ static int netc_timer_get_reference_clk_source(struct netc_timer *priv) /* Select NETC system clock as the reference clock by default */ priv->clk_select = NETC_TMR_SYSTEM_CLK; - priv->clk_freq = NETC_TMR_SYSCLK_333M; + if (priv->revision == NETC_REV_4_6) + priv->clk_freq = NETC_TMR_SYSCLK_133M; + else + priv->clk_freq = NETC_TMR_SYSCLK_333M; /* Update the clock source of the reference clock if the clock * is specified in DT node. -- 2.43.0