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Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by SG2PEPF000B66CC.mail.protection.outlook.com (10.167.240.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.592.5 via Frontend Transport; Wed, 4 Nov 2026 12:50:19 +0000 Received: from ubuntu (unknown [172.20.64.99]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id 1FF0840920E2; Wed, 4 Nov 2026 20:44:38 +0800 (CST) From: Jelly Jia To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.murphy@arm.com, sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com, linux-clk@vger.kernel.org, joakim.zhang@cixtech.com Subject: [PATCH v2 0/5] soc: cix: Add the Sky1 AUDSS DMA-350 interrupt path Date: Wed, 4 Nov 2026 20:44:32 +0800 Message-ID: <20261104124437.296753-1-Jelly.Jia@cixtech.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PEPF000B66CC:EE_|TY2PPFB683BA8FF:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: ecd55323-0c76-43ca-7c81-08df3a722f05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|23010399003|1800799024|7416014|376014|6133799003|10067099003|18002099003|3023799007|261102123227099003|56012099006|5023799004|261022075727099003|261028144727099003|261021121427099003|261026121527099003|261022105027099003|261021123027099003|261026140227099003|261009223027099003|260925021911599003|260925021311599003|260925022911599003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wmUI32+fX16G3RZDCpjO6Yk+VHWmX9mXiUpiMjACU2ISEVDxNBxGDyQZd9I2elLQmNwHNnJ19SO4b+UnXPmSMRsgetS/9HSMqmawLgRb8wkXa//7q+o3AJqq+tmJ7y56gBZvVZEX9CF5AYFinmbWIWxbHFrZ1hy/0XiS7jnQPGoFx+SFMVUIQZPhQrGRjSqbP96pvokCj/t9WuZXGCXdVBez6YiKUsGANmRNuikEvbq4yJbzoq1QKmxs7PqYnQmsE5rHXQKf2Vlp8GbVHd8ocojH0tTGKmPJnE9aFhst0kQXeDX0DzpS0SI9Xck+L2eW4GSAg3F/xdfZBeVxKLtXAAraTUz9JI2t4bZ/RkTSQ/z8/58/AOvp+2KV/3oBhTfJR2B8O4V912UtdyU2ncfldwbtx7oKiKyP13If83WYKYdyDcKlZPfujVUV3pAWhcRa X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2026 12:50:19.7750 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ecd55323-0c76-43ca-7c81-08df3a722f05 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG2PEPF000B66CC.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: TY2PPFB683BA8FF Hello, This series adds the CIX Sky1 AUDSS DMA-350 and its interrupt path through the audio subsystem CRU. The DMA, CRU and DT changes are posted together because the controller depends on the CRU interrupt gates, while dma-channel-mask describes which channels Linux may use. Keeping them together allows the complete interrupt path to be reviewed. If separate submissions are preferred, they can be split in the next revision. No audio client drivers are added here. It depends on the companion v5 series, "dmaengine: arm-dma350: Add slave support and Sky1 integration", for slave/cyclic transfers and optional clock and reset support. Apply that series first. The CRU gates the AP interrupt path for each of the eight DMA channels and combines enabled inputs onto GIC SPI 230. Channels may be reserved for firmware or the DSP; dma-channel-mask limits those available to Linux. The AP gate bits control interrupt delivery, not channel ownership, and this series does not implement runtime AP/DSP ownership transfer. Conor suggested interrupt-map when the routing was described as being configured by firmware. This series instead manages each AP gate via irq_mask and irq_unmask. A static interrupt-map alone would translate child specifiers to the shared GIC SPI but would not provide that gate control. Model the CRU as an irqchip so the register owner manages the gates, without CRU register accesses in the DMA driver. Feedback on this choice of irqchip rather than a static interrupt-map is welcome. The gate register exposes no per-channel pending status. The chained handler polls every enabled child, and each DMA channel handler checks its own status. The children use level flow handling with IRQ_IS_POLLED so disabled and oneshot-threaded interrupts remain masked, while inactive channels returning IRQ_NONE do not accumulate spurious-IRQ counts. The AUDSS DT describes a 1 MiB peripheral window and a 512 MiB DRAM window with dma-ranges. The prerequisite series allocates linked commands from a coherent DMA pool, so successfully allocated commands are reachable through the controller's DMA address windows. Changes since v1: - Drop the unrelated GIC node from the binding example. (Krzysztof.) - Retain Krzysztof's Reviewed-by for the dma-channel-mask binding. DMA-350 supports one to eight channels, so the single-cell mask is retained. (Frank's array-handling question.) - Use raw regmap locking, explicit irq_disable and level flow handling with polled children, including the oneshot-threaded case. (Sashiko.) - Dispose of child IRQ mappings before removing the domain and select IRQ_DOMAIN for COMPILE_TEST configurations. (Sashiko.) - Associate the domain with the PM device, protect teardown register accesses, quiesce the parent IRQ before runtime suspend and use noirq system sleep callbacks. Save and restore software reset state as part of the CRU context. (Sashiko.) - Rebase onto Linux 7.4-rc1 and use irq_domain_create_linear(). Signed-off-by: Jelly Jia Jelly Jia (5): dt-bindings: soc: cix: Describe the Sky1 AUDSS DMA IRQ controller clk: cix: Handle Sky1 AUDSS DMA interrupt gates as an irqchip dt-bindings: dma: arm,dma-350: Document dma-channel-mask dmaengine: arm-dma350: Honour dma-channel-mask arm64: dts: cix: Add the Sky1 AUDSS DMA-350 integration .../devicetree/bindings/dma/arm,dma-350.yaml | 3 + .../bindings/soc/cix/cix,sky1-audss-cru.yaml | 37 +++- arch/arm64/boot/dts/cix/sky1.dtsi | 26 ++- drivers/clk/cix/Kconfig | 1 + drivers/clk/cix/clk-sky1-audss.c | 181 +++++++++++++++++- drivers/dma/arm-dma350.c | 20 +- 6 files changed, 261 insertions(+), 7 deletions(-) base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4 prerequisite-patch-id: aad1bc3c30a4825048143a3e0395e696201548e9 prerequisite-patch-id: d7f5243feddb5f16231302bd4c948d359ca92ac1 prerequisite-patch-id: ddc9ee115f12a7d2ee7ceff7e0485e7166581756 prerequisite-patch-id: 3d5fb2f7a5b2da42cb013d1c2e0a6e5eac5ffd6a prerequisite-patch-id: 0e54074dcfd104480233bb076d2424e6ba1bd25e -- 2.54.0