[PATCH net] net: phy: c45: select 10BASE-T1L type when forcing 10 Mbit/s

[Iustin Stolniceanu <iustin.stolniceanu@analog.com>]

Since 25108a834e14, genphy_c45_pma_setup_forced() writes the type
selection field of the BASE-T1 PMA/PMD control register (1.2100) on
every forced setup, using 0 for anything other than 1000 Mbit/s. 0 is
100BASE-T1, which a 10BASE-T1L PHY like the ADIN1100 does not support,
so the forced link never comes up.

Select 10BASE-T1L for SPEED_10 when the PHY reports 10baseT1L_Full
support.

Tested on EVAL-ADIN1110EBZ (ADIN1110 with internal ADIN1100 PHY). After

  ethtool -s ethX autoneg off speed 10 master-slave forced-master

1.2100 reads 0xc002, it was 0xc000 before.

Fixes: 25108a834e14 ("net: phy: c45: add support for 1000BASE-T1 forced setup")
Signed-off-by: Iustin Stolniceanu <iustin.stolniceanu@analog.com>
---
 drivers/net/phy/phy-c45.c | 4 ++++
 include/uapi/linux/mdio.h | 1 +
 2 files changed, 5 insertions(+)

diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c
index 870920311f9a..8671deda81c9 100644
--- a/drivers/net/phy/phy-c45.c
+++ b/drivers/net/phy/phy-c45.c
@@ -182,6 +182,10 @@ int genphy_c45_pma_setup_forced(struct phy_device *phydev)
 		bt1_ctrl = 0;
 		if (phydev->speed == SPEED_1000)
 			bt1_ctrl = MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000;
+		else if (phydev->speed == SPEED_10 &&
+			 linkmode_test_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT,
+					   phydev->supported))
+			bt1_ctrl = MDIO_PMA_PMD_BT1_CTRL_STRAP_B10L;
 
 		ret = phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1_CTRL,
 				     MDIO_PMA_PMD_BT1_CTRL_STRAP, bt1_ctrl);
diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index 06f4bc3c20c7..f46529451cc8 100644
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -419,6 +419,7 @@
 /* BASE-T1 PMA/PMD control register */
 #define MDIO_PMA_PMD_BT1_CTRL_STRAP		0x000F /* Type selection (Strap) */
 #define MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000	0x0001 /* Select 1000BASE-T1 */
+#define MDIO_PMA_PMD_BT1_CTRL_STRAP_B10L	0x0002 /* Select 10BASE-T1L */
 #define MDIO_PMA_PMD_BT1_CTRL_CFG_MST		0x4000 /* MASTER-SLAVE config value */
 
 /* 1000BASE-T1 PCS control register */
-- 
2.43.0