From: Besar Wicaksono <bwicaksono@nvidia.com>
To: <acme@kernel.org>, <namhyung@kernel.org>, <irogers@google.com>,
<ctshao@google.com>
Cc: <linux-tegra@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-perf-users@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <vsethi@nvidia.com>,
<rwiley@nvidia.com>, <skelley@nvidia.com>, <mochs@nvidia.com>,
<rajjoshi@nvidia.com>, <treding@nvidia.com>,
<jonathanh@nvidia.com>, <john.garry@linux.dev>, <will@kernel.org>,
<james.clark@linaro.org>, <mike.leach@arm.com>,
<leo.yan@linux.dev>, <mark.rutland@arm.com>,
<alexander.shishkin@linux.intel.com>, <jolsa@kernel.org>,
<adrian.hunter@intel.com>,
Besar Wicaksono <bwicaksono@nvidia.com>
Subject: [PATCH v3 0/7] perf: Add NVIDIA Tegra410 uncore PMU events and metrics
Date: Wed, 4 Nov 2026 16:07:09 +0000 [thread overview]
Message-ID: <20261104160716.2910873-1-bwicaksono@nvidia.com> (raw)
Add event aliases and derived metrics for the NVIDIA Tegra410 uncore
PMUs, and fix perf's aggregation of the Tegra410 PCIe PMU instances.
The series covers the UCF, PCIe, PCIe target, CPU memory latency, and
chip-to-chip interconnect PMUs. It provides symbolic names for the raw
event encodings and metrics for bandwidth, frequency, and average read
latency.
The PCIe and PCIe target PMUs are named nvidia_pcie_pmu_<socket>_rc_<rc>
and nvidia_pcie_tgt_pmu_<socket>_rc_<rc>. perf only strips the number at
the end of a PMU name, so the instances of each socket were treated as a
different PMU, and these events and metrics gave one result per socket
and were reported incorrectly (e.g. with --metric-only), as discussed in
v1 and v2. Patches 6 and 7 fix this:
- Patch 6 adds a check of the cpumasks of all merged PMU instances to the
zero-count skip in perf stat, so a socket that counts nothing shows 0
instead of having its row hidden.
- Patch 7 treats both numbers of the NVIDIA PCIe PMU names as the
suffix, so the instances on all sockets are merged as nvidia_pcie_pmu
or nvidia_pcie_tgt_pmu. Per-RC results are still available with
--no-aggr or -A.
Changes in v3:
- Replace v2 patches 7-9 (merging PMU instances that match the same
comma-separated json Unit, naming a merged counter after all of its
PMUs, and the ABI document) with a special case for the NVIDIA PCIe
PMU names in pmu_name_len_no_suffix(), perf_pmu__match_wildcard() and
pmu_name_cmp(). Thanks to Ian Rogers for the suggestion.
Changes in v2:
- Move the uncore JSON out of the sys directory and remove the
"Compat" fields. Thanks to Ian Rogers for the feedback.
- Drop "perf jevents: Process model files before sys subdirectories",
which this series no longer needs.
- Add UCF SLC and memory bandwidth metrics from all sources to local
CMEM (read, write and read+write) and from local sources to local
CMEM and to remote memory, PCIe bandwidth metrics to local
destinations, and read+write bandwidth metrics for UCF SLC, UCF
memory and PCIe. Thanks to Chun-Tse Shao for the suggestion.
- Add patches 6-9 to fix the PCIe instance aggregation. Thanks to Ian
Rogers and Chun-Tse Shao for the pointers.
v2: https://lore.kernel.org/all/20261030174816.1544471-1-bwicaksono@nvidia.com/
v1: https://lore.kernel.org/all/20261019164241.403644-1-bwicaksono@nvidia.com/
Besar Wicaksono (7):
perf jevents: Add support for NVIDIA Tegra410 UCF PMU aliasing
perf jevents: Add support for NVIDIA Tegra410 PCIE PMU aliasing
perf jevents: Add support for NVIDIA Tegra410 PCIE-TGT PMU aliasing
perf jevents: Add support for NVIDIA Tegra410 CPU Memory Latency PMU
aliasing
perf jevents: Add support for NVIDIA Tegra410 C2C PMU aliasing
perf stat: Check merged PMU instance's cpumasks when skipping zero
counts
perf pmus: Treat both numbers of NVIDIA PCIe PMU names as suffix
.../arm64/nvidia/t410/uncore-cpu_mem.json | 43 +
.../arm64/nvidia/t410/uncore-nvclink.json | 67 ++
.../arm64/nvidia/t410/uncore-nvdlink.json | 43 +
.../arm64/nvidia/t410/uncore-nvlink_c2c.json | 115 +++
.../arch/arm64/nvidia/t410/uncore-pcie.json | 249 ++++++
.../arm64/nvidia/t410/uncore-pcie_tgt.json | 83 ++
.../arch/arm64/nvidia/t410/uncore-ucf.json | 764 ++++++++++++++++++
tools/perf/util/pmu.c | 9 +
tools/perf/util/pmus.c | 23 +
tools/perf/util/stat-display.c | 20 +
10 files changed, 1416 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-cpu_mem.json
create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-nvclink.json
create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-nvdlink.json
create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-nvlink_c2c.json
create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-pcie.json
create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-pcie_tgt.json
create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/uncore-ucf.json
--
2.43.0
next reply other threads:[~2026-11-04 16:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 16:07 Besar Wicaksono [this message]
2026-11-04 16:07 ` [PATCH v3 1/7] perf jevents: Add support for NVIDIA Tegra410 UCF PMU aliasing Besar Wicaksono
2026-11-04 16:07 ` [PATCH v3 2/7] perf jevents: Add support for NVIDIA Tegra410 PCIE " Besar Wicaksono
2026-11-04 16:07 ` [PATCH v3 3/7] perf jevents: Add support for NVIDIA Tegra410 PCIE-TGT " Besar Wicaksono
2026-11-04 16:07 ` [PATCH v3 4/7] perf jevents: Add support for NVIDIA Tegra410 CPU Memory Latency " Besar Wicaksono
2026-11-04 16:07 ` [PATCH v3 5/7] perf jevents: Add support for NVIDIA Tegra410 C2C " Besar Wicaksono
2026-11-04 16:20 ` Ian Rogers
2026-11-04 16:46 ` Besar Wicaksono
2026-11-04 16:07 ` [PATCH v3 6/7] perf stat: Check merged PMU instance's cpumasks when skipping zero counts Besar Wicaksono
2026-11-04 16:07 ` [PATCH v3 7/7] perf pmus: Treat both numbers of NVIDIA PCIe PMU names as suffix Besar Wicaksono
2026-11-04 16:25 ` [PATCH v3 0/7] perf: Add NVIDIA Tegra410 uncore PMU events and metrics Ian Rogers
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261104160716.2910873-1-bwicaksono@nvidia.com \
--to=bwicaksono@nvidia.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=ctshao@google.com \
--cc=irogers@google.com \
--cc=james.clark@linaro.org \
--cc=john.garry@linux.dev \
--cc=jolsa@kernel.org \
--cc=jonathanh@nvidia.com \
--cc=leo.yan@linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mike.leach@arm.com \
--cc=mochs@nvidia.com \
--cc=namhyung@kernel.org \
--cc=rajjoshi@nvidia.com \
--cc=rwiley@nvidia.com \
--cc=skelley@nvidia.com \
--cc=treding@nvidia.com \
--cc=vsethi@nvidia.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®