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[67.168.198.145]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b0b3160634sm50146a91.6.2026.11.04.09.59.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Nov 2026 09:59:37 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Anna Maniscalco , Rob Clark , Sean Paul , Konrad Dybcio , Akhil P Oommen , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v5 2/6] drm/msm: Resume perfcntrs after hw_init Date: Wed, 4 Nov 2026 09:59:22 -0800 Message-ID: <20261104175931.28475-3-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261104175931.28475-1-robin.clark@oss.qualcomm.com> References: <20261104175931.28475-1-robin.clark@oss.qualcomm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTA0MDA3MSBTYWx0ZWRfX9/ux3DraRJVR LDSs/4xFNfNzuTPwbGd+CeV/u7i2IrvnoHu+av4tyJYwBxUOHtwnGrCSmMH9LwtEQ+3X+q8AB+K MxODINFXM5vjchoYOY+JwrCpNnxPBh8KfLcbmYB+GKyFqvZLIM1VN7RVVP6NqTrTzVo/xulxuFT mzPSA771f2sjCo9sASQ+13X+BC5Ue9GoJbkgjkldyNGCsI42GJVzwhG74lLnpvJgSyPXlzoX35n FQ97dHJBIbiiTdCc8FH6Htv7JgzM9kRsTicSn13DLH3Cz35W87QV403iKFiOjkHIpCf6p4vtaY9 iT/In2OkPJtM048WVVc5/yrE7zxrMPFbTL7AYl6Ed6W8vGtBsGgXKpH59HtwVLTcRr02rrkhkPF lE6nkKnA1SB+U2goM0XbS6Y0JbvRv4oCVVf3FCTxXU9kxOmth8DXqaH9o/vfVF5J76Guh0ZVf1h x3EZCmVdKKOe9y3pcWw== X-Authority-Analysis: v=2.4 cv=KLLPn1Fo c=1 sm=1 tr=0 ts=6aeb728a cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=6Rn/7xRx7Ub4NEhlm8k1cw==:17 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=QD1EvTAd08FZB_lsx5gA:9 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: J2QKDMMcsafy8VFr7ep1MUcf63H-TB0B X-Proofpoint-GUID: J2QKDMMcsafy8VFr7ep1MUcf63H-TB0B X-Proofpoint-Spam-Info: AW1haW4tMjYxMTA0MDA3MSBTYWx0ZWRfX/ycX1PgM3Xc4 1rRFkvEIq0b/D707eiEnqfe4JpaAmrbkf5O543JQdYi+at1ioFePtWrWt74BHD4g+IPv3QeJVDb sJTux/kIIbhAmL71VXHq75GvH0uuQdg= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-04_05,2026-11-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 clxscore=1015 phishscore=0 bulkscore=0 spamscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2611040071 It isn't really useful to start sampling counters before hw_init(). And the next commit will require IFPC OOB request to come after hw_init(). Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_device.c | 5 +---- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 1 - drivers/gpu/drm/msm/msm_gpu.c | 4 +++- drivers/gpu/drm/msm/msm_perfcntr.c | 9 ++++++++- 4 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 7108d4aa59b5..749269843e42 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -309,10 +309,7 @@ MODULE_DEVICE_TABLE(of, dt_match); static int adreno_runtime_resume(struct device *dev) { struct msm_gpu *gpu = dev_to_gpu(dev); - int ret = gpu->funcs->pm_resume(gpu); - if (!ret) - ret = msm_perfcntr_resume(gpu); - return ret; + return gpu->funcs->pm_resume(gpu); } static int adreno_runtime_suspend(struct device *dev) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 6db6cb7eb287..d074f4df78f6 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -720,7 +720,6 @@ void adreno_recover(struct msm_gpu *gpu) msm_perfcntr_suspend(gpu); gpu->funcs->pm_suspend(gpu); gpu->funcs->pm_resume(gpu); - msm_perfcntr_resume(gpu); ret = msm_gpu_hw_init(gpu); if (ret) { diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index fb07803f5aba..ca21b3bf20df 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -168,8 +168,10 @@ int msm_gpu_hw_init(struct msm_gpu *gpu) disable_irq(gpu->irq); ret = gpu->funcs->hw_init(gpu); - if (!ret) + if (!ret) { + msm_perfcntr_resume(gpu); gpu->needs_hw_init = false; + } enable_irq(gpu->irq); return ret; diff --git a/drivers/gpu/drm/msm/msm_perfcntr.c b/drivers/gpu/drm/msm/msm_perfcntr.c index ce65b1160955..36ce9a102c5e 100644 --- a/drivers/gpu/drm/msm/msm_perfcntr.c +++ b/drivers/gpu/drm/msm/msm_perfcntr.c @@ -199,10 +199,17 @@ sel_worker(struct work_struct *w) return; scoped_guard (mutex, &gpu->lock) { + /* + * If gpu still needs hw_init, bail. We'll be rescheduled + * after hw_init, and there is no point to collect counters + * beforehand + */ + if (gpu->needs_hw_init) + return; + guard(mutex)(&gpu->perfcntr_lock); if (stream == gpu->perfcntrs->stream) { - msm_gpu_hw_init(gpu); gpu->funcs->perfcntr_configure(gpu, ring, stream); } } -- 2.56.0