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[2.155.41.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b56f5e65b0sm15526735e9.11.2026.11.04.13.58.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Nov 2026 13:58:51 -0800 (PST) From: =?UTF-8?q?Enrique=20Hern=C3=A1ndez=20Bello?= To: shawn.lin@rock-chips.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, bhelgaas@google.com Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, dlemoal@kernel.org, iav@iav.lv, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Enrique=20Hern=C3=A1ndez=20Bello?= Subject: [PATCH v5 0/2] PCI: rockchip-host: Make the PERST# inactive delay configurable Date: Wed, 4 Nov 2026 21:58:45 +0000 Message-ID: <20261104215848.2087944-1-ehbello@gmail.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit rockchip_pcie_host_init_port() waits T_PVPERL, 100 ms, before releasing PERST#. The line has been asserted since the GPIO was acquired early in probe, so that wait is also the reset pulse width. Endpoints do not agree on what they want there. Some need longer to settle; a JMB585 behind a ROCK Pi 4C stops answering configuration reads if the pulse is stretched that far. The measurements are in patch 2. So, as Shawn suggested, take the delay from the device tree instead of changing it for everyone. Patch 1 documents rockchip,perst-inactive-ms and rockchip,s2r-perst-inactive-ms, named after the properties the Rockchip vendor driver already carries for the dwc-based controllers; patch 2 reads them. The defaults leave current behaviour untouched, so there is no Fixes: tag and nothing to backport. There is no DT patch for my board in this series. Its JMB585 sits on a Radxa Penta SATA HAT, which is not described upstream, so the property belongs in an overlay. Tested on that board with the series backported to 6.18.58, the kernel Talos Linux ships; only the context of the #include hunk differs. One kernel build, two images that differ only in the overlay: with rockchip,perst-inactive-ms = <0>, the JMB585 enumerated on 4 boots out of 4; without the property, all 3 boots hit the same SError in rockchip_pcie_rd_conf() during probe that the board hits without the series. Igor, since the defaults are unchanged, a Helios64 with no DT change should behave exactly like plain mainline. If you want to exercise the property as well: &pcie0 { rockchip,perst-inactive-ms = <10>; }; A wait of 0 to 15 ms enumerated 17 times out of 17 on my board, but your slot supply is a GPIO-switched regulator where mine is always on, so I would not take my numbers as a guide for yours. v4: https://lore.kernel.org/all/20261028014116.2432425-1-ehbello@gmail.com/ v3 (discussion with Shawn): https://lore.kernel.org/all/20261028005603.2399220-1-ehbello@gmail.com/ Changes in v5: - Take the delay from the device tree, as suggested by Shawn Lin, instead of shortening the wait automatically when the slot supplies were found already enabled. - Drop struct rockchip_pcie::supplies_pre_enabled and rockchip_pcie_supplies_enabled() altogether. That also retires the hole Shawn found in them: devm_regulator_get() returns a dummy regulator for an absent rail and the dummy reports itself enabled, so the old test was unconditionally true on a board describing none of its supplies, on resume included. - Keep the 100 us floor from v4, now for any value a board asks for. - Split into a bindings patch and a driver patch. Changes in v4: - Hold PERST# for T_PERST-CLK in the shortened path. Old power does not imply an old REFCLK: init_port() runs phy_init()/phy_power_on() on every probe and resume, so the PLL relocks microseconds before the release. Measured 72-75 us by ftrace, i.e. a real violation of the 100 us minimum. Enrique Hernández Bello (2): dt-bindings: PCI: rockchip,rk3399-pcie: Add PERST# inactive delay properties PCI: rockchip-host: Make the PERST# inactive delay configurable .../bindings/pci/rockchip,rk3399-pcie.yaml | 15 +++++++++++ drivers/pci/controller/pcie-rockchip-host.c | 26 ++++++++++++++++--- drivers/pci/controller/pcie-rockchip.h | 2 ++ 3 files changed, 39 insertions(+), 4 deletions(-) -- 2.56.0